24V to 14.4V With LM5143_SCH.pdf
Dear TI,
Could you help to review the SCH design using LM5143 attached.
Thanks!
Best Regards
Jeremy
Main comments on the schematic are as follows:
The FETs are "standard" level, not logic level. Choose a FET with Rdson rated at Vgs = 4.5V (so it is compatible with 5V gate drive). The Miller plateau should be ~3V, not ~5V as with this FET. Consider using 40V FETs if Vin-max is 32V.
Secondly, the output cap is super high for a 14.4V output. Recommendation is to use more ceramic capacitance (2-4pcs of 22uF/25V) and reduce the electrolytic. This affects the compensation network as well (Rcomp is very high and so is Ccomp2).
Last, add input filter damping (electrolytic =4*Cin).
Regards,
Tim
Hi Jermey,
That FET is fine. Its Miller plateau is at 3V, perfect for a 5V gate drive. You can check losses in the quickstart.
Just looking at the quickstart file you sent, I recommend reducing Cout as mentioned previously - this is to help with compensation (lower Rcomp value) and startup (avoid current limit). Also, the FB divider can be lower resistance if you encounter noise on that node. Just keep the parallel combination > 5kΩ to avoid being detected as a fixed 5V output.
Regards,
Tim
