Part Number: TPS650864
1.TPS6508641配置寄存器,在OTP代码生成工具中关于时序逻辑配置(如下图)选项卡有解释说明或者有说明文档吗?麻烦告知下每行每列配置的含义和个选项逻辑关系,谢谢

2.我现需要把时序配置如下图逻辑,在配置VTT_LDO需要配到CTL5和CTL2,在下拉菜单无此选项,这个问题是怎回事,是我这配置方法有问题还是无法按这个时序逻辑配置,若是方法有问题麻烦告知下正确方法,谢谢

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Hi shu fei,
Thanks for using E2E!
1) We have an application note that goes through all the details of the OTP Generator here: TPS65086100 Non-Volatile Memory Programming Guide
Note that the TPS650864x PMICs are pre-programmed and are not meant to be changed by the user. For custom programming we recommend the TPS650861
Let me know if you still have any other questions about specific parts of the OTP Generator.
2) It is not possible to use both CTL2 and CTL5 for a single power rail. CTL 3 & 4 is the only option that uses two CTL pins at once (this is usually used for sleep enable control but it should also work as a power rail enable).
If you need more than one control signal for a specific rail (such as VTT_LDO), I recommend that you use the PGOOD signal from a previously enabled rail. This will ensure that VTT_LDO will not turn on until the previous rails are ready, even if the VTT_LDO CTL pin is asserted. This method also gives you access to the flexible delay system located on the far right columns of the "Inputs to Enable Logic" table. Again, I want to note that the TPS650864x PMICs have a pre-programmed sequence that works with certain processors. The TPS6506100 PMIC is better for custom designs since all power rails will be deactivated by default and the OTP programming is effectively blank.
As mentioned by Daniel, for future replies, please post in English so we can provide the best assistance.
Regards,
James