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TPS65917-Q1: Warm reset and turn-off with TPS65917-q1

Part Number: TPS65917-Q1
Other Parts Discussed in Thread: TPS65916, AM5716, TPS65919-Q1

Dear Experts,

we are designing a new board with AM5716 and the PMIC TPS65917-q1, previously we had the TPS65916 but this is not available any more.

My reference are: SLVSCO4D (TPS65917-Q1 datasheet) and SLVUAX9E (TPS65919-Q1 and TPS65917-Q1 User's Guide).

I have the architecture like in Figure.5 where a FPGA drives the EN (POWERHOLD-GPIO_5 pin of TPS65917) and the Warm Reset (RESETn pin E23 of Sitara). BOOT=1 (connected to LDOVRTC_OUT)

From SLVUAX9E par. 6.3: "A warm reset is triggered by setting NRESWARM (GPIO_1) low, which causes the OFF2ACT sequence to be executed regardless of the actual state (ACTIVE, SLEEP), and the device returns to or remains in the ACTIVE state. [...] Additionally, if BOOT=1, then RESET_OUT is asserted low during the worm reset sequence. [...] If BOOT=1 is used, then the PMIC must be enabled by the POWERHOLD (GPIO_5) pin.[...]. If POWERHOLD is set to GND while BOOT=1, the PMIC will shut off during the warm reset sequence."

My issue are:

  • RESET_OUT doesn't go low when I drive low RESETn of SItara that drives low NRESWARM (GPIO_1) of the PMIC. ARM15 stops working and I have to power off and on.
  • NRESWARM (GPIO_1) and POWERHOLD (GPIO_5) both LOW ARM15 stops working and I have to power off and on.

With PMIC TPS65916 I have to drive LOW and then HIGH both NRESWARM and POWERHOLD in order to have RESET_OUT low and a reboot of the system.

My three goals are:

  1. turn on the system -> OK this works
  2. reboot Sitara changing boot sequence -> KO and Sitara freezes (with TPS65916 was OK)
  3. turn off the system -> KO

Can you help me?

Best regards

Francesco

  • Hello Francesco,

    I will look into this tomorrow and should be able to give you a response by Thursday.

    Regards,

    Alex

  • Hi Francesco,

    Would you be able to tell me the OTP versions of the TPS65917 and TPS65916?

    Regards,

    Alex

  • Hi Alex,

    OTP of TPS65916 is 0x45, OTP of TPS65917 is 0x4D.

     

    Regards,

    Francesco

  • Francesco,

    I have confirmed that one of the differences between the 0x45 and 0x4D OTPs is that the 0x45 asserts RESET_OUT low during a warm reset whereas 0x4D does not (it keeps RESET_OUT at VIO). So the behavior seen is expected.

    For the new device (65917), the OTP configures SMPS12 in dual phase whereas for the 916, SMPS 1 and 2 were single phase. Can you confirm that your new board been updated for this change? Apologies if this seems rather basic but I just want to eliminate some low hanging fruit.

    Also can you clarify what you mean by "KO"? Once I understand what you mean here I can have a better idea of what you're trying to do and how we can do it with the new OTP settings.

    turn off the system -> KO

    Regards,

    Alex

  • Hi Alex,

    I understand what you say but about the RESET_OUT why in SLVUAX9E par. 6.3 they write: "Additionally, if BOOT=1, then RESET_OUT is asserted low during the warm reset sequence"?

    In the new design I configured SMPS12 in dual phase, thank for your remark.

    In order to get a warm reset I force LOW both POWERHOLD/GPIO_5 of the PMIC and RESETn of Sitara. After this, Sitara set LOW NRESWARM/GPIO_1 of the PMIC. When I release both signals, Sitara restart with a Linux reboot. This happens with TPS65916.

    With TPS65917, after releasing POWERHOLD/GPIO_5 and RESETn, Sitara doesn't respond on the debug uart (uart3), stops making the LEDs blinking and ethernet doesn't work.

    regards

    Francesco

  • Francesco,

    I will look into this more today and have a response by tomorrow.

    Regards,

    Alex

  • Hi Francesco,

    I understand your confusion. Later in the User's Guide you reference if you look at Figure 18 it is shown that the RESET_OUT signal stays HI during a warm reset. I agree it can be a bit confusing with the text but that is why the figures are shown to give a better idea of what each signal will do.

    In addition, I apologize for not seeing this sooner but it looks like you are trying to use the TPS65917 device with an AM5716  processor. This device is not recommended to use with this processor as it was configured for the like of the DRA78x and TDA3x. The TPS65916 which you had been using is recommended for use with the AM5716 as per the Technical Documentation available on the product page.

    Can I ask why you'd switched to the TPS65917? You indicated the 916 was not available anymore, can you clarify what you mean by this? It has not been obsoleted and is listed as "Active" on its product page.

    Lastly, can you re-clarify exactly what your issue is? There may still be something we can do but I do not follow what you mean by "KO" in points 2 and 3 below.

    • turn on the system -> OK this works
    • reboot Sitara changing boot sequence -> KO and Sitara freezes (with TPS65916 was OK)
    • turn off the system -> KO

    Regards,
    Alex

  • Hi Alex

    an I ask why you'd switched to the TPS65917? You indicated the 916 was not available anymore, can you clarify what you mean by this? It has not been obsoleted and is listed as "Active" on its product page.

    TPS659162RGZR (PMIC for AM5716) is Active but it is not available because the lead time is >52 weeks. So we opened a request in TI forum with this answer: "For the alternative products of TPS659162RGZR ,I have selected two products for you(Pin-for-pin with same functionality and in stock).

    https://www.ti.com/store/ti/en/p/product/?p=O919A14CTRGZRQ1

    https://www.ti.com/store/ti/en/p/product/?p=O917A14DTRGZRQ1"

    We have chosen O917A14DTRGZRQ1 because it is pin-to-pin with our board. Let me know if there is any issue.

    Lastly, can you re-clarify exactly what your issue is? There may still be something we can do but I do not follow what you mean by "KO" in points 2 and 3 below.

    For KO in point 2 I mean that after a warm reset Sitara doesn't respond on the debug uart (uart3), stops making the LEDs blinking and ethernet doesn't work. If I ground and release manually RESET_OUT, AM5716 reboot as expected.

    In point 3, KO means that if I force LOW both POWERHOLD/GPIO_5 of the PMIC and RESETn of Sitara, ARM15 remains on.

    Regards

    Francesco

  • Francesco,

    OK understood. Can you send the link to the forum which recommended this part to you?

    Regarding the KO in point 2, it seems link you really just need RESET_OUT to go low during a warm reset like it did for the TPS65916 in order for AM5716 to respond. Is that correct?

    For point 3, you are trying to turn off the system by forcing POWERHOLD/GPIO_5 of the PMIC and RESETn of Sitara. Is this correct?

    Regards,

    Alex

  • Alex,

    Can you send the link to the forum which recommended this part to you?

    I'm sorry, I don't have the link because a colleague of mine made that question and at the moment I can't reach him. TPS65916 has SMPS1 and SMPS2 separated but at the same voltage, TPS65917 has SMPS12 together, LDO4 is slightly different in the power up and down sequences.

    Correct for the other two questions.

    How can I do the ACT2OFF sequence?

    Regards

    Francesco

  • Francesco,

    OK please send me the forum information whenever you can. I would like to understand when/where we recommended this and make any necessary corrections.

    I will have to ask around internally to see what can be done for the ACT2OFF sequence. I will try to get back to you tomorrow or it may even be Monday.

    Regards,

    Alex

  • Alex,

    the only information I could get is: Case Number:  CS1012726 Short Description:  lead time. I think it is from TI customer support center.

    At the moment I have one board with Sitara AM5716 and the PMIC TPS65917-Q1 and it works fine. Should I expect some issues?

    If I pull to ground PWRON pin for 5 seconds I can have a ACT2OFF sequence. When I release it, Sitara reboots.

    Regards,

    Francesco

  • Francesco,

    At the moment I have one board with Sitara AM5716 and the PMIC TPS65917-Q1 and it works fine.

    Sorry I am a bit confused now. To be clear, is the TPS65917 OTP of the device above 0x4D? If so and you are saying it works fine, what is the device/processor combination we are working with now that give you the issues the the RESET_OUT/warm reset?

    If I pull to ground PWRON pin for 5 seconds I can have a ACT2OFF sequence. When I release it, Sitara reboots.

    Is pulling PWRON to GND for 5 seconds a viable solution? 

    Regards,

    Alex

  • Alex,

    I'm sorry I was not clear.

    Our boards have AM5716 with DDR3L and TPS65916 (OTP 0x45).

    As far as I have got from datasheet:

    • TPS65917 (OTP 0x4D and with BOOT=1) has the same power supplies than TPS65916.
    • TPS65916 has SMPS1 and SMPS2 stand alone while TPS65917 SMPS1&2 are in dual-phase configuration. In any case they are at the same voltage.
    • At power up and down LDO4 (connected to VDDA33V_USB of Sitara) has different timing between the two PMIC
    • The addresses of I2C bus and the configuration of registers seem the same

    We tried one of our boards with TPS65917 (OTP 0x4D) and, apparently, ARM15, DSP and peripherals work like with the TPS65916. This is what I mean for "it works fine".

    The main difference I see is in the warm reset, this doesn't work. From my yesterday tests, I can do a ACT2OFF and OFF2ACT sequences pulling PWRON to GND and releasing it after 5 seconds. PWRON pin is floating now, I have to connect it to an external logic (FPGA). This can solve my problem.

    Is there any other issue with TPS65917 (OTP 0x4D) with AM5716?

    Regards

    Francesco

     

  • Francesco,

    Thank you for clarifying. To my knowledge there are no other issues with the TPS65917 (OTP 0x4D) w/AM5716 combination.

    With that said I would suggest that you review the User's Guides for the TPS65917 and TPS65916. The 916 is optimized for use with the AM57 series processors whereas the 917 is more meant for other devices such as the DRA7 series. Given the pin-to-pin compatibility, however, these parts can be swapped so long as all OTP differences are accounted for which might mean minor issues such as the one discussed.

    Please let me know if there is anything else I can help you with. Thank you!

    Regards,

    Alex

  • Thanks for your support.

    Francesco