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BQ76952: Shutdown & Wakeup Timing

Jiatu Li
Prodigy 120 points
Part Number: BQ76952

TI experts,

I notice if LD pin is higher than 1.4V, then BQ76952 shutdown sequence will pause until LD pin drop lower than 1.4V. I wonder after LD pin drop lower than 1.4V, how long need to shutdown BQ76952 or turn off REG18?

In my 1st test as shown in FIG.1, the DSG/CHG FET were on, then start shutdown command. With DSG FET turn off, the LD pin voltage is droping from VBAT. After LD pin drop below 1.4V, it takes 52ms to shutdown REG18.

However in my 2nd test as shown in FIG2, the DSG/CHG FET were off, but 3.3V voltage was on LD pin. Then, start shutdown sequence and turn off 3.3V on LD pin. It can be seen after LD pin drop below 1.4V, it takes 241ms to shutdown REG18.

So, what's the exactly shutdown sequence? It relates how long need turn off DSG/CHG FET after shutdown my BMS system.

FIG.1 CH1 DSG PIN, CH2 REG18, CH3 LD PIN, CH4 RST_SHUT PIN

FIG.2 CH2 REG18, CH3 LD PIN, CH4 RST_SHUT PIN

  • 0
    TI__Guru* 81034 points

    Hi Jiatu,

    The slope of the curve on your LD pin is very slow and the LD voltage threshold is not precisely at 1.45V. See the datasheet spec below - there is a wide range on this spec:

    In order to test the Shutdown timing more accurately, you need a faster transition on the LD pin. For example, if you quickly transition from 2.5V to 0V on the LD pin, you can measure the time it takes for REG18 to power off.

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 120 points

    Hi Matt,

    Thanks for your reply and comments, it works well with your method.

    Beside, I also tested OCD1 and OCDL function. Like Fig.1, I set OCD1 threshold to 4mV, Load detect active time to 1s, retry relay to 1s.

    The ch1~4 are respectilvely are LD pin, REG18, DSG pin, IRsense(I add another DC source with CC function to set Rsense with 4.5A).

    I have questions about to accelerate OCD recovery due to LOAD REMOVE:

    (1) When does the LD pin current source enable?

    (2) When does BQ76952 determine Load is removed? I see after LD pin current source enable and increase to Vbat votlage (24V) for 1s, LD pin current source disabled for 1s, then DSG FET re-enable.  

  • 0 in reply to Jiatu Li
    Prodigy 120 points

    Hi Matt,

    I also have other three questions about LD pin.

    The TRM said "BQ76952 will stay in a "soft shutdown" state until the TS2 pin voltage is no longer below VWAKEONTS2, and the LD pin voltage is below VWAKEONLD''. If cell is in very low voltage and need shutdown but a 2.5V wrong voltage is on LD pin, then BQ76952 will keep stay in "soft shutdown" mode.

    Will not this "soft shutdown" mode drain cells deeply? Why not just let BQ76952 enter shutdown mode? Besides, if the hardware over temperature shutdown sequence affected by LD pin and TS2 pin? 

  • 0 in reply to Jiatu Li
    TI__Guru* 81034 points

    Hi Jiatu,

    Section 5.2.18 of the TRM describes the load detect recovery options and registers in detail. 

    The reason the LD threshold for Shutdown is a lower value is because this device supports applications down to 3 series cells. So if this threshold was a much higher value, the lower cell count configurations would not work in this case. 

    Regards,

    Matt