• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 267 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM25085: Strange board behavior when IC is switching

TI_Lover
Prodigy 150 points
Part Number: LM25085

Hello TI team!

Here are the application details:

  • Vin= 12.0 - 14.4V
  • Vout= 12.4V
  • Load= 5A
  • Fsw= 300kHz
  • 4 layer PCB (Signal 1, GND, PWR, Signal 2)

We have noticed that when our LM25085 regulator is switching, the digital circuits on our PCB start malfunctioning (LCD freezes, I2C communications get stuck, MCU internal ADCs give skewed conversions). The regulator itself functions exactly as expected and waveforms look normal.

The issues are very clearly only during switching. If Vin is less than 12.4 and the IC is operating with 100% duty cycle, the errors do not occur regardless of load current.
When it is switching, the errors don't seem to get any more/less severe depending on the load. The board is just as likely to fail at 100mA load as it is with 5A load. As long as it is switching...

As an experiment I replaced the 0-ohm gate resistor with 10-ohm and the malfunctions went away.

To me this suggests radiated noise from the switcher are disrupting the nearby digital blocks. Which is quite strange because oscilloscope captures of things like VDD and I2C SDA/SCL are quite clean.

I would like to ask the following questions:

  1. Do you have any suggestions for improving layout? We tried to keep the loops small. Maybe it's not perfect but I wouldn't expect it to be so bad it breaks the system...
  2. What method is better for preventing high frequency emissions: gate resistor, switch node snubber, or other? I'm not sure which is best for this specific issue. 
  3. Could the cause actually be something else? I'm worried the gate resistor was just a lucky cover up of a different issue... (It does seem the switch node under/overshoot improves with gate resistance).

Thanks in advance for your help :)

Schematic:

Layout:

(please excuse the missing models - they are not DNP, just no 3D models imported)
(red: ON loop; blue: OFF loop; green: gate drive)

Switch node (0-ohm Rgate):

(19ns fall time; 6ns rise time)

Switch node (10-ohm Rgate):

(45ns fall time; 11ns rise time)

  • 0
    TI__Guru 50120 points

    Hi,

    1. Is the SW node only on the top layer or are there any other layers with the SW plane? Given that the heat sink pad of the PFET is connected to the switch node, there is a compromise between heat dissipation and minimization of the MEI radiation from this switching node. If there is any additional SW plane, then I would suggest limiting it to minimize EMI radiation. Putting a resistor in series with the PGATE is basically impacting the drive strength of the PFET and would result in slower slew rate with less overshoot. See blog on slew rate for EMI control (https://e2e.ti.com/blogs_/b/powerhouse/posts/how-to-use-slew-rate-for-emi-control) which is what you are effectively doing on the PGATE pin. Also discussed is the snubber circuit.

    2. The resistor and snubber circuit method have the drawback that it will impact the high-side switching losses, but I think the 10Ohm resistor is a good start. 

    3. What you are seeing is simply the byproduct of a high dv/dt overshoot as a result of turning on/off the PGATE that connects VIN to SW node. There is no inherent operational issues. This is more of an EMI concern for sensitive applications.

    Regards,

    Jimmy