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TPS54320 SYNC Question

James Fuerherm
Prodigy 100 points
Other Parts Discussed in Thread: TPS54320

I am planning on using 3 TPS54320's all sync'd to a 500kHz system clock. The pulse width of this clock is 250ns. The datasheet states that the minimum required sync pulse width is 20ns (on page 4 of the datasheet). Meanwhile, in the application notes, it states that the pulse width should be 20%-80% duty cycle on page 13. This seems like conflicting information. Will I be able to use the sync function in my application?

  • 0
    TI__Guru**** 191445 points

    20 nsec is "typically" the minimum pulse width that the internal PLL will detect.  The recommended pulse width is 20-80% of the clock period.  It is a suggestion not a requirement.  Your pulse width is greater than an order of magnuted larger than the minimum.  I don't see any problem with that.