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LP8733: LP87334D Powering up issue.

RANJITH RAMACHANDRAN
Prodigy 30 points
Part Number: LP8733
Other Parts Discussed in Thread: TPS563210,

Hello ,

We are using LP87334D for powering up AM243x. Our pre regulator is TPS563210. Please see the schematic attached.

Infact we are getting a 5V output from pre regulator and it is going to LP87334D input. But we are not able to get any output from LP87334D. When we observed what we can see is like the voltage at EN pin and PGOOD is really low (33mV);(EN and PGOOD is shorted). As PGOOD pin is in gated mode of operation in LP87334D(As told in technical reference manual) what I can see from datasheet is that during power up sequence PGOOD will be active (high) upon exiting OTP configuration as initial state and after that for a normal power up sequence PGOOD state is not changed for 800us and it should remain in high state itself as long as output is not going unregulated. But in our case we are not even seeing an high state in PGOOD. Requesting your expertise to suggest what might have went wrong here.

Thanks

Ranjith 

  • 0
    TI__Expert 4985 points

    Hi Ranjith,

    PGOOD of LP87334D is an output and it should not be connected to the EN signal. When the PMIC is enabled it starts to ramp up the output voltages for the regulators. During this ramp up PGOOD is actively pulled low which pulls EN pin down. Therefore, the regulators will not get enabled.

    BR,

    Samuli

  • 0 in reply to Samuli Piispanen
    Prodigy 30 points

    Hi Samuli,

    But as per datasheet PGOOD will be high during start up for gated mode(LP87334D is preprogrammed to gated mode). And in gated mode it is suggested for PGOOD to do a wired-OR with signal connected to EN input. Infact i read it wrongly as it can be wired with signal connected to EN input. So can you please suggest how should i connect PGOOD with EN input so that once PGOOD is going low because of any fault it will make enable also to go low and there by a proper power down sequence will happen. 

  • 0 in reply to RANJITH RAMACHANDRAN
    TI__Expert 4985 points

    Hi Ranjith,

    Using gated mode for this case should work. LDO1 is missing the output caps and could be unstable causing the PGOOD error. Have you probed LDO1 output voltage?

     

    BR,

    Samuli

  • 0 in reply to Samuli Piispanen
    Prodigy 30 points

    Infact not only LDO1, i don't have any of the outputs. But as per datasheet if LDO1 is not used i can leave the output pin floating and input pin connected to VANA right. Correct me if i am wrong in doing that.

    So as we are in gated mode it is ok to tie PGOOD to EN pin right? In that case what else can make the EN to be in 33mV level. +5V is there properly and all resistors shown in the schematic are mounted properly. Is there anything else i need to check.

  • 0 in reply to RANJITH RAMACHANDRAN
    TI__Expert 4985 points

    Hi Ranjith,

    Not used in this context means that the regulator is not enabled. LDO1 on LP87334DRHDR is EN pin controlled as described in the technical reference manual of the device.

    https://www.ti.com/lit/pdf/snvu791

    Either the output capacitance must be populated or the LDO1_EN bit must be written to 0 before pulling EN pin high.

    BR,

    Samuli

  • 0 in reply to Samuli Piispanen
    Prodigy 30 points

    Even after mounting an output capacitor for LDO we are not getting 0.85V. during startup PGOOD is staying high for 1.2ms and there after PGOOD is going low and even 3.3V/1.8V is going low slowly. Shorting PGOOD and EN in gated mode of operation is ok right or should we try cutting that trace.

  • 0 in reply to RANJITH RAMACHANDRAN
    TI__Expert 4985 points

    Hi Ranjith,

    I was able to power up the EVM with EN and PGOOD tied together with PGOOD being in gated mode.

    Can you provide scopeshots of the output of the regulators together with the EN signal? One of the regulators must be out of the monitoring.

    BR,

    Samuli

  • 0 in reply to Samuli Piispanen
    Prodigy 30 points

    Hi Samuli

    I will capture all the waveforms and will send it to you. 

    Thanks in Advance

    Ranjith 

  • 0 in reply to RANJITH RAMACHANDRAN
    Prodigy 30 points

    Hi Samuli, 

    Just one clarification.

    As per this power up sequence there is a delay of 2ms for 0.85V to get power up once enable is up. Just one question whether PGOOD will stay high more than 2ms during startup?

    Please see the waveforms during startup

    .

    PGOOD-Yellow Blue-3.3V

    PGOOD-Yellow LDO0(1.8V)-Blue

    PGOOD-Yellow LDO1-Blue.

    0.85V is not getting generated at all in this case. PGOOD is staying high for 1.21ms and there after going low. Please let me know your thoughts.

    I will be sending much detailed waveform with PGOOD, all output voltages and input voltage captured together.

    Thanks in Advance

    Ranjith 

  • 0 in reply to RANJITH RAMACHANDRAN
    TI__Expert 4985 points

    Hi Ranjith,

    It seems like the input voltage is collapsing. 5V is used for the PGOOD/EN and it seems to start to shifting down. Same behavior is seen in 3.3V output voltage and the output voltage is shifting down due to the minimum voltage difference required between input and output. The sharper down slope in 3.3V is the start of the actual shutdown from LP8733-Q1 side.

    When the 5V drops by 15% it triggers preregulator PG to low. This results in EN pin going low.

    BR,

    Samuli

  • 0 in reply to Samuli Piispanen
    Intellectual 280 points

    I have had similar issues with PGOOD. The datasheet seems to say the output is driven high from the LP87334DRHDR. However, it seems to float. I added  a 10K pull-up to VANA and it seems to work correctly and reliably. It seems the pin is acting like its an open drain.

    Perhaps this needs to be listed as an errata?

    I plan to add the pullup in my designs

  • 0 in reply to lance Forman
    TI__Expert 4985 points

    Hi Iance,

    PGOOD is open drain in LP87334DRHDR. See the technical reference manual https://www.ti.com/lit/pdf/snvu791

    As far as I know the issue in this case was the input voltage transients cause by the startup.

    BR,

    Samuli