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UCD3138: Confirm the the maximum time of Watchdog Timer for UCD3138

Johnny Chen
Expert 4910 points
Part Number: UCD3138

Hi Champ,

I am confirming for the customer.

From the UCD3138 datasheet, the nominal Watchdog time out range(TWD) for UCD3138 is 17ms, and total Watchdog Timer time is getting by TWD*(WDCTRL.PERIOD + 1).

So it is calculated by 17ms*(127+1) = 2.176s for the maximum amount of time of watchdog timer for UCD3138 that can be planned to use by user, correct ?

Also, it should be 7 bits for PERIOD in register WDCTRL, so the reset value should be 0111 1111 in TRM, correct ?

Thanks and regards,

Johnny

  • +1
    TI__Genius 17090 points

    Johnny, that is correct.  If you look at the UCD3138 Technical Reference Manual on page 244, it will be spelled out for you:

    https://www.ti.com/lit/ug/sniu028d/sniu028d.pdf

    "11.15 Watchdog Prescale and Counter
    The watchdog "prescale" is the WD_PERIOD bit field. It sets the counter period for the watchdog to a time
    between approximately 17ms typical (14.5ms Min to 20.1ms max) and approximately 2.2 sec typical (1.85 sec
    Min to 2.6 sec Max). Note that these numbers are for a specific device and a specific version of that device.
    Consult the current data sheet for the specific device you are using."

    The variation is because it uses a separate clock which is not temperature compensated.  That way the device will also be reset by a failure of the processor clock.