Dear,
During start up, a short overvoltage appears at the output, cca 1V/3ms above 5V. The input voltage is 24V/+-10%. What is the reason for overvoltage? How can this be solved? Thanks in advance for the suggestions. Best regards, Petr.
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Dear,
During start up, a short overvoltage appears at the output, cca 1V/3ms above 5V. The input voltage is 24V/+-10%. What is the reason for overvoltage? How can this be solved? Thanks in advance for the suggestions. Best regards, Petr.
hi, Petr
Looking from the datasheet ,the input and output cap could be larger than yours, could you try to increase input cap ,and check Vin Vout SW IL waveform, also need you could share PCB Layout for check .
Elena
Hi Elena. Increasing value of input cap.does not help but progress is visible when we increase output cap.. We added to current 2x47uF one cap.with value 180uF, over voltage is now 0,4V during start up. It is accept for us. Please look at the layout if you see any problem. Thank you, Petr
hi, Petr,
The output ripple or unstable is caused by many item, like input power stage has too fast transient ,or over spiked, we can increase input cap to improve. Out put cap also help with the ripple and loop stability, in your application it is a fixed Vout version so we could do nothing to add a CFF or RFF to improve the gain margin phase margin. The layout looks good, if you want to double confirm suggest to do a loop test and view the bold plot.
Elena
Hi Elena
I have to go back to our issue. I found in the datasheet (9.2.1.2.2) that not posible use bigger output cap.than 220uF. What is the reason? What happened whan we use eg.330uF polymer output cap., KEMET T545Y337M10ATE35? Thank you for feedback. BR,Petr
If the Cout capacitance is too large then the circuit may not have enough bandwidth and causes unstable loop.
Hi Elena. Thank you for explanation. Let me summarize: layout is OK, Cin has no effect, L we tested sizes 220u/330u/470u and it has no effect, only Cout has an effect but the max. capacity of 220uF can be used, I am sending a picture. The initial overvoltage is now 5V+0.8V. Is there also a limit regarding ESR min? Do we have any other option to reduce the output overvoltage when the source starts up? Petr
hi Petr,
Please try to compare the Vout difference before and after increased. if you could also have a loop test, check phase and gain margin, and share the result here to confirm the loop is stable ,then if is fine to increase Vout cap, since we already know it works .
Elena
Hi Elena,
I'm attaching measurements with an output capacity of 2x150uF and Gain and Phase measurements for a 100mA load. The output voltage is now below 6V with some margin. Can you please evaluate whether this combination of output capacitor can be used?
Thank you. Petr
hi, Petr,
The Vout waveform looks good, and could check under 100mA the device is CCM mode , usually we test loop stability in CCM, if it is DCM , the it will not have loop issue.
Elena
Petr,
Usually we required phase margin 45 degree and gain margin -10db around, checking the test result , it looks good .
BTW may I ask if this is an exist project or a new design, and on which customer side, Since the LM2594 is really old part, we are willing to recommend new device with same function and better performance. you could share more infor to elena-gao@ti.com if you want. Thank you for post on E2E.
Elena