UCC28782: QR mode operation (SBP1/SBP2/LPM)) question for UCC28782

Hi Tetsu,

Thank you for the query on UCC28782.

I will revert back to this query by tomorrow.

Regards,

Harish

Hi Tetsu,

I assume by QR mode you are mentioning about the valley switching mode operation in LPM and SBP modes. As the PWMH will be disabled and there will be no ZVS in this mode. The ZCD is detected from Vs pin as you suggested and there will be no dead time optimization. After the arrival of the ZCD pulse, PWML will turn on after a propagation delay td(zcd) as given in datasheet under Vs section. The delay time needs to be set based on AAM mode (through RTZ and RDM) where there will be optimization and adjustment based on ZCD, ZVS and deadtime control based on the Vbulk level.

Yes the time from PWMH off to PWML on will be decided by RTZ pin as you mentioned. This will be the minimum time tz at max Vbulk set by the RTZ pin. Depending on Vbulk (lower value) and RDM,  the dead time will increase to optimize ZVS.

Please let me know if you have additional queries.

Thank you

Regards,

Harish

Hi, Harish,

Thank you for your reply.

Understood.
Is this delay only?

I think the filter is formed by the stray capacitance of the VS pin and the resistor connected to the VS pin.
What is the stray capacitance of the VS pin?

Thanks.

Hi Tetsu-San,

There is no mention of the parasitic capacitance allowed on the Vs pin in the datasheet. The layout mentions to not run any ground plane underneath the Vs pin for reducing the capacitance. As the ZCD detection has to happen before ZVS tuning from SWS pin and the recommended cap is 22pf here, it is advisible to have it lesser than this delay (Rcws/Ccws).

Regards,

Harish

Hi, Harish,

Thank you for your reply.

I am aware of the following parts:

Please let me know the actual value of the parasitic capacitance of VSpin (IC only).
I want to calculate the typical value of the delay time and verify whether the operation of the actual machine is appropriate.

Thanks.

TETSU

Hi Tetsu-San,

Thank you for the follow up. There is no actual value of recommended capacitor mentioned in the datasheet. It has to be verified on the board based on my previous post. I will check with the systems designer to see if he has any number on this.

Regards,

Harish 

Hi, Harish,

Thank you for your reply.

We apologize for the inconvenience, but it would be helpful if you could confirm that you measure it.

Regards,

TETSU

Hi Tetsu-San,

As you have opened a new thread for this question, please let me know if I can close this thread as we can followup on the new thread.

Regards,

Harish

こんにちは、ハリッシュ、

ここで確認したいのは、VS端子の端子容量です。新しいスレッドで尋ねたのは、各端子に接続できる許容寄生容量です。
したがって、VS端子容量とVS端子に許容される許容接続容量を新しいスレッドで答えると、このスレッドを閉じることができます。

よろしく

鉄津

Hi Tetsu-San,

Thank you for coming back. I presume these are overlapping questions, but will anyway check for the recommended capacitance (if any). We will come back to you early next week as we are off a couple of days this wee.

Regards,

Harish