TPS2410: Can unused the output signal pin be floating?

Hi Praven!

Thanks for your help, customer has started evaluating of TPS2410. But they still have some specific questions.

1. What is the humidity sensitivity grade of this device?

2.What is the difference between TPS2410PWR and TPS2410PWRG4?

Shuai

Hi Praven!

I have a question about the logic diagram of this IC.

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In DS, it says Fault is active (low) for any of the following conditions:

• Insufficient VDD

• GATE should be high but is not.

• The MOSFET should be ON but the forward voltage exceeds 0.4 V.

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There are two assumptions, which exists in normal operation.

Assuming the voltage between GATE and A is higher than 0.75V;

Assuming the voltage between A and C is lower than 0.4V.

But from the logic diagram showed in below, FLTB is 0 logic in above assumption, which is constrict with 

the description in DS.

Could you please help to check whether the logic diagram has error?

Best regards

Shuai

Hi Shuai,

The correct block diagram should have an inverted input OR gate as shown below. That is if any of the inputs is 0, then the output of the OR gate should be 1. If both the inputs are 1 (i.e. NO Fault condition) then the output of OR gate should be 0.