• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 87 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM5110: Output logic

Liu Yang
Expert 5895 points
Part Number: LM5110
Other Parts Discussed in Thread: LM5111

Hi Team,

LM5110-3M is composed by Inverting “A” OUTPUT and Noninverting “B” OUTPUT.

During UVLO mode what is the logic of output “A” and “B”, all the Low or following the table 2?

Under forum maintenance it will be very helpful if you can contact me via email 

Best Regards,
Tom Liu

  • 0
    TI__Genius 11750 points

    Hello Tom,

    Hopefully you can see this message. For this device, UVLO always pulls the output low. For driving PMOS, many people would like the UVLO to pull high to turn off the PMOS. If that is what you are looking to do, LM5111 has that feature. Although, it doesn't have the split grounds. 

    Thanks,

    Alex M.