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TPS62420 PCB Layout method to isolate input and output ground.

Gordon van den Broek
Prodigy 30 points
Other Parts Discussed in Thread: TPS62420

The TPS62420 Eval Board uses isolated top copper only connections for the input and two outputs. The input voltage and associated grounds are all separate traces. However, in the real world the input and two output grounds must be all be connected. I'm using a 4 layer PCB and interconnections for the TPS62420 are on layer  3, while layers 2 and 4 are solid copper (layer 1 is top copper and components). Because of noise issues I'm using MuRata 1uF feed-through capacitors on the input and both outputs. So at this point the ground planes and top copper grounds will all be connected together.

Even with shielded inductors I've noticed that radiation is quite bad. So I've laid out for a Laird board level shield over the entire switcher. This also makes it hard to isolate grounds as the shield connects all grounds around the switcher.

My first thought was to run keep outs on the inner layers to control where the ground currents flow. Now I'm wondering if I'm over thinking this and should simply allow the inner ground planes to connect all grounds internally and simply follow the eval board layout to control ground currents in the immediate vicinity of the switcher. Another thought was that if I used keep outs to control the ground currents, to arrange them so as to create an internal star ground system where all grounds connect at a single point where they attach to the internal ground planes.

Any advice, especially from experience would be welcomed.

 

  • 0
    TI__Mastermind 36110 points

    I suggest following the EVM layout guidelines immediately around the IC.  It's important to force the high frequency, high current grounds where you want them to go so they don't interfeer with other sensitive circutiry.  Outside of that, you can connect grounds together again.  Note how the EVM separates the grounds from the sensitive feedback circuitry from the input capacitor ground.  These are tied together right at the IC.

  • 0 in reply to Matthew Day
    Prodigy 30 points

    That's what my basic thought was as well. The one issue not to forget is that the ground slug vias, which are at the center of the high current switching, tie all of the internal ground planes together.  The vias connect the high current point with the input and output grounds via multiple low impedance ground planes. This kind of defeats the isolated top copper ground paths. Should the internal ground planes isolate the ground around these vias? If so, I would expect a fairly large area of isolated ground to be recommended so that heat can be radiated away from the part.

  • 0 in reply to Gordon van den Broek
    TI__Mastermind 36110 points

    The internal ground planes to not need to isolate the vias.  They can be tied to the vias to spread the heat.  Don't connect the analog ground to the internal planes.  Just connect it at the IC's ground and tie it to the exposed copper under the IC.  The exposed copper is connected to ground, but you can not assume current will all flow up into the IC through the exposed thermal pad.  The board shoud be designed so that the proper current path reaches the ICs power ground pin.

  • 0 in reply to Matthew Day
    Prodigy 30 points

    There is no analog ground, just ground. This is predominantly an RF product. Analog, digital and RF ground is one and the same. One layer is ground plane only, but large areas of ground exist on the other 3 layers as well, all common. 48V is regulated down to +5V with a PoE switcher. The PoE switcher +5V output feeds the TPS62420. The PoE switcher ground is tied to the internal ground planes. So without isolating the ground vias, there are two paths to the slug vias. Through the ground plane and through the top copper ground traces. The PoE +5V ground has to be connected to the TPS62420 input ground (as it powers this part) and the 1.8V and 3.3V output grounds (as they power common circuitry). That means that by necessity, the PoE ground has to connect to both the TPS62420 input and output grounds.

  • 0 in reply to Gordon van den Broek
    TI__Mastermind 36110 points

    You are correct that the TPS62420 does not have a separate ground plane.  All grounds on your board can be electrically connected together; however, be careful to route them properly around the TPS62420.  You will want to cut the ground plane to match the EVM grounding around the IC to ensure the high switching currents do not flow across the grounding path for the lower current analog signals like the FB,1 DEF_1, and ADJ2 pins.