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[FAQ] How to calculate the discharge of the bootstrap capacitor in half-bridge driver applications

FAQ: How to calculate the discharge of the bootstrap capacitor in half-bridge driver applications

There are a few elements in the half-bridge circuit that have an impact in the discharge of the bootstrap capacitor and understanding these helps ensure that the HB-HS voltage stays above the UVLO thresholds at all times during operation. The main elements that discharge the bootstrap capacitor are:

1. Charging of the FET’s Qg: Immediate drop, happens during rise time of the high-side driver’s output.

  • Using Q=C*V, the immediate voltage drop is V=Q/C, where:
    • Q” is the FET’s gate charge
    • C” is the capacitance of the bootstrap capacitor
    • V” is the immediate voltage drop on the bootstrap capacitor due to charging of the FET’s Qg

    2. HB quiescent current: It will slowly discharge the bootstrap capacitor during long times.

    • Using IT=CV, the voltage drop due to the HB quiescent current in a specific time interval is V=IT/C, where:  
      • I” is the HB quiescent current of the driver
      • T” is the time it takes for the capacitor to discharge to “V” level
      • V” is the voltage drop in the capacitor after “T” time interval
      • C” is the capacitance of the bootstrap capacitor

      3. Gate to source resistor (if used): It will discharge the bootstrap capacitor over time.

      • The voltage drop in a specific time interval can be estimated the same way as done for the HB quiescent current (#2 above) using V=IT/C, where:  
        • I” is the current through the gate to source resistor. To simplify, calculate the current using the initial HB voltage divided by the resistance value
        • T” is the time it takes for the capacitor to discharge to “V” level
        • V” is the voltage drop in the capacitor after “T” time interval
        • C” is the capacitance of the bootstrap capacitor

        The addition of the immediate voltage drop calculated in #1 and the voltage discharge over time calculated in #2 and #3 should not exceed the allowable voltage drop on HB pin to ensure that the high side driver stays above UVLO during the time that the high side channel is on. For applications with low switching frequency, such as motor drive, the gate to source resistor can have a large impact.

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