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UCD90320: Margin function / waveform check

Part Number: UCD90320

Hi :

1. If mean value of power rail with enabled margin function can't reach expected value, how can I do?

Increase/decrease PWM frequence?

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2. Is it possible to make tolerance of margin function keep in +- 0.5%?

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3. Since this is the first time I use margin function, could you help check if following waveform is OK or not?

*VR is TPS568215RNNR, Margin high/low is +- 5%

*The first waveform is single shot, the 2nd is 1k acqs.

*There're two phases for 0.9V

(1) 0.9V (Margin high = 0.945V, Margin low = 0.855V)

=>Margin high : 

0.9V_LEO1

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0.9V_LEO2

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=> Margin low

0.9V_LEO1

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-

0.9V_LEO2

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-

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(2) 1.1V (Margin high = 1.155V, Margin low = 1.045V)

=>Margin high

=> Margin low

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-

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(3) 1.2V (Margin high = 1.26V, Margin low = 1.14V)

=>Margin high

=> Margin low

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(2) 1.8V (Margin high = 1.89V, Margin low = 1.71V)

=>Margin high

=> Margin low

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-

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(2) 5V (Margin high = 5.25V, Margin low = 4.75V)

=>Margin high

=>Margin low

  • Hi

    1. you may reduce the R3 and/or R4 value to increase margining voltage range.

    2. I am not sure what you mean here: do you want to reduce the ripple?

    3.  As long as you system can take the signal, they shall be fine.

    Regards

    Yihe

  • 2. Yes

    For example, I want to set margin high, nomial, as 1.89V.

    Is it possible to make ripple(p-p) less than 1.89mV (+- 0.5%)?

  • Hi 

    if the ripple is too large, you can decrease the frequency or increase the C1 value.

    Regards

    Yihe

  • `Hi Yihe:

    Could you help provide recommended value of R3/R4/C1/F DPWM value base on my measurement result?

    1. 0V9_LEO1 :

    R3/R4 = 66.5k ohm, C1 = 180p F, FVR = 400kHz, F DPWM = 1MHz, Duty cycle = 18%

    =>Margin high target (nomial) = 0.945V, Vpp < 9.45mV

    Measurement mean = 0.939V, Vpp=14mV

    =>Margin low target (nomial) = 0.855V, Vpp < 8.55mV

    Measurement mean = 0.8491V, Vpp=12mV

    -

    2. 0V9_LEO2:

    R3/R4 = 66.5k ohm, C1 = 180p F, FVR = 400kHz, F DPWM = 1MHz, Duty cycle = 18%

    =>Margin high target (nomial) = 0.945V, Vpp < 9.45mV

    Measurement mean = 0.9359V, Vpp=10.4mV

    =>Margin low target (nomial) = 0.855V, Vpp < 8.55mV

    Measurement mean = 0.8487V, Vpp=13.6mV

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    3. 1V1

    R3/R4 = 54.9k ohm, C1 = 220p F, FVR = 400kHz, F DPWM = 1MHz, Duty cycle = 18%

    =>Margin high target (nomial) = 1.155V, Vpp < 11.55mV

    Measurement mean = 1.141V, Vpp=20.4mV

    =>Margin low target (nomial) = 1.045V, Vpp < 10.45mV

    Measurement mean = 1.04V, Vpp=22.8mV

    -

    4. 1V2

    R3/R4 = 84.5k ohm, C1 = 1n F, FVR = 1.2MHz, F DPWM = 200kHz, Duty cycle = 18%

    =>Margin high target (nomial) = 1.26V, Vpp < 12.6mV

    Measurement mean = 1.229V, Vpp=20mV

    =>Margin low target (nomial) = 1.14V, Vpp < 11.4mV

    Measurement mean = 1.133V, Vpp=18.8mV

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    5. 1V8

    R3/R4 = 20k ohm, C1 = 3.3n F, FVR = 1.2MHz, F DPWM = 500kHz, Duty cycle = 18%

    =>Margin high target (nomial) = 1.89V, Vpp < 18.9mV

    Measurement mean = 1.884V, Vpp=22mV

    =>Margin low target (nomial) = 1.71V, Vpp < 17.1mV

    Measurement mean = 1.701V, Vpp=35.6mV

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    6. 5V

    R3/R4 = 13.7k ohm, C1 = 5.6n F, FVR = 1.2MHz, F DPWM = 300kHz, Duty cycle = 18%

    =>Margin high target (nomial) = 5.25V, Vpp < 52.5mV

    Measurement mean = 5.238V, Vpp=222mV

    =>Margin low target (nomial) = 4.75V, Vpp < 47.5mV

    Measurement mean = 4.739V, Vpp=208mV

  • Hi

    Have you followed this tool with all the correct input? in the other post, i saw that the inputs do not match. 

    If the ripple is too large, either reducing the pwm frequency or increase the C1. you have tested on the own board.

    Regards

    Yihe 

  • Hi Yihe:

    If measurement mean value of margin low is lower than I want, but margin high is ok.

    Which part do I need to increase or decrease?

  • Hi

    What's the percentage below? is this ripple or mean voltage? 

    Is increase the margin low threshold acceptable?

    have you change the FSW to see? 

     Regards

    Yihe

  • Hi Yihe:

    Thanks for help.

    After enlarge range of Vout and tunning margin high setting, I can have the value I want.

    -

    Another question:

    To lower ripple of margin high and margin low at the same time, except for increasing value of C1, what else action could I do?

    Increase soft-start time?

    *Criteria of ripple for P1V2 is <12mV with BW 100MHz.

    But as you can see, Max. value is over 12mV no matter margin high or low.

    => P1V2_1 Margin high


    => P1V2_1 Margin low

    => P1V2_2 Margin high

    => P1V2_2 Margin low

  • Hi

    There are two ways to reduce the ripple:

    reducing the FSW or increasing the C1.

    Regards

    Yihe