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HD3SS3220: Power-On Requirements

Sadanori Kato
Guru 36540 points
Part Number: HD3SS3220
Other Parts Discussed in Thread: TUSB322, HD3SS3212

Hi,

"VDD5 and VCC33 Power-On Requirements" are added on page 17 of HD3SS3220 data sheet by changing from revision C to revision D. So, I have a question.
These pins of SDA/OUT1 and SCL/OUT2 are an open drain output in UFP mode (ADDR pin is NC). Therefore, our customer pulled up these pins of DIR, SDA/OUT1 and SCL/OUT2 to VCC33 by using the resistors. The USB bus power is supplied to VDD5 and VCC33 is generated from VDD5 by LDO regulator. This usage condition corresponds to Figure 7-2 during the power-on, but it cannot satisfy tVDD5V_PG > 2ms. VCC33 will power up immediately.
Could you please let me know if you have any concerns about the above usage? I am particularly concerned about the long-term reliability of the device.
In addition, if there is a workaround, please let me know as well.

Best regards,
Kato

  • 0
    TI__Guru*** 146445 points

    if you can not satisfy tVDD5V_PG > 2ms, you need to control ENn_CC high until both VDD5 and VCC3e are stable.

    regards

    Brian

  • +1 in reply to Brian Zhou
    Guru 36540 points

    Hi Brian-san,

    Thank you for your quick response.

    Timing requirements for "tENnCC_HI > 2ms" and "tVDD5V_PG > 2ms" were suddenly added when data sheet of HD3SS3220 was changed from revision C to revision D. So, there is concern about the impact on market products that do not meet the conditions.
    Could you please tell me why it was necessary to update the data sheet and any concerns about the long-term reliability of the device?
    In addition, the schematic for UFP implementation on page 30 of data sheet revision D still leaves the ENn_CC pin pulled down to GND. This is likely to lead to misleading.

    Best regards,
    Kato

  • +1 in reply to Sadanori Kato
    TI__Guru*** 146445 points

    Kato-San:

           We changed datasheet based on customer feedback for their design issue, but once it working on their system, it should not any concerns for long-term reliability of the device. Since what ever power sequence, it will not damage device.

           For revision D page 30, it did a little bit confusion since it assumes  it satisfy tVDD5V_PG > 2ms.

    Regards

    brian

  • 0 in reply to Brian Zhou
    Guru 36540 points

    Hi Brian-san,

    Thank you for your information.

    Our customers are very concerned about the power-on requirements, so could you share the details of customer feedback for their design issue with me?

    Best regards,
    Kato

  • +1 in reply to Sadanori Kato
    TI__Guru*** 146445 points

    Kato-san:

        Sometimes customer report UFP device can not be recognized, then we check waveform of VDD5V and VCC3v. So we realized we need to add power on sequence to datasheet.

    Regards

    Brian

  • 0 in reply to Brian Zhou
    Guru 36540 points

    Hi Brian-san,

    Thank you for providing very important information.

    I understand and will contact you if I get additional questions from our customer.

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    Guru 36540 points

    Hi Brian-san,

    I just got an additional question from our customer.
    You said that the long-term reliability of the device should not be any concerns as long as the products which are brought to the market are working normally. So, should future products which will be brought to the market be redesigned according to revision D "VDD5 and VCC33 Power-On Requirements"? It's very hard work for them if they need to change the design.

    Best regards,
    Kato

  • +1 in reply to Sadanori Kato
    TI__Guru*** 146445 points

    If just same product upgrade, then no need to redesign. if for totally new product , suggest to follow revision D.

    Regards

    brian

  • 0 in reply to Brian Zhou
    Guru 36540 points

    Hi Brian-san,

    Thank you for your comment.

    I understand.

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    Guru 36540 points

    Hi Brian-san,

    I just got additional questions from our customer asb following. So, could you please give me your comments?

    Our customer use HD3SS3220 in UFP mode, if new power sequence is not followed, does that mean DFP device or DRP device cannot recognize UFP device?
    Additionally, you said that "Sometimes customer report UFP device can not be recognized". So, could you please tell me the detailed information about this background?

    Best regards,
    Kato

  • +1 in reply to Sadanori Kato
    TI__Guru*** 146445 points

    Hi Kato-san:

         The HD3SS3220 is a MCM of HD3SS3212 and TUSB322.  The HD3SS3212 is powered from 3.3V and TUSB322 is powered from 5V.  There are some pins on TUSB322 that are NOT failsafe.  if tVDD5V_PG < 2ms. those  un failsafe pins may back drive the device and cause CC detection fail.

         But if customer haven't seen any issue, then old design should be fine.

    Regards

    Brian

  • 0 in reply to Brian Zhou
    Guru 36540 points

    Hi Brian-san,

    Thank you for the detailed information.

    We will discuss this issue with our team members.

    Best regards,
    Kato