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TPS23881: TPS23881 is used for POE BT，when it has a sifos bt test， the parameter of Det+CC_Time doesn't meet the requirements

jingjing liu
Prodigy 40 points
Part Number: TPS23881

HI all,

      several chips of  TPS2881 is used for POE BT interfaces in a switchboard.When it  has a sifos bt test，  the parameter of Det+CC_Time doesn't meet the requirements.

      The parameter of   Detect_Time_Tdet_A is 490.2ms,The parameter of   Detect_Time_Tdet_B is 300.8ms,  the parameter of Det+CC_Time is 773.4ms;The define of  Det+CC_Time is the total time duration of Detection on both pairsets and Connection Check.The requirement is to complete all in 500msec.   The test will relax that requirement in cases where it is observed that at least one connection check and at least one pairset detection are fully completed in the final 500msec that the intent of the 802.3bt standard is accomplished.

      The design is showed as the picture。Can you give me some recommends, thank you.

  • 0
    TI__Intellectual 1480 points

    Hi Jingjing, 

    The Det+CC_Time failure could be due to the port voltage not turning off fast enough at the end of your detection cycle. You can verify this by measuring the port voltage using an oscilloscope. 

    Can you try replacing L55 with a zero ohm shorting resistor and rerunning the Sifos test? 

    Regards, 

    Sai Gunda

  • 0 in reply to Sai Gunda
    Prodigy 40 points

    Hi sai,

            The Det+CC_Time according the define is the time of turning on.I am not very sure of it.

           I measure the voltage of gate is 11.5V when the switch board connected with a PD.Also,the time of gate voltage droping from 11.5V to 28mV is about 300us when I take away the PD using an oscilloscope.The reson is not the L55 according the time.

           The parameter of Det+CC_Time is 773.4ms .It seems to the sum of Detect_Time_Tdet_A and Detect_Time_Tdet_B.As POE bt ,the software should start of detection at the sametime.

          Can you give me some other  recommends, thank you.

  • 0 in reply to jingjing liu
    TI__Intellectual 1480 points

    Hi Jingjing, 

    I believe the IDLE state is when the voltage drops below 2.8V. Can you rerun just the Test: det_time with waveforms enabled? Sifos software should be able to generate the waveforms on both AltA and AltB pairsets so we can get better insight into the failure. 

    I suspect what is happening is slow slewing voltage during the detection stage. The root cause could be any passive element in the power path which is increasing the time constant of the trailing edge. This maybe due to the passives shown in your screenshot or transformer circuit which is not shown. 

    Regards,

    Sai Gunda

  • 0 in reply to Sai Gunda
    Prodigy 40 points

    Hi Sai,

          I see the datasheet of TPS23881,the max DET time is 425ms,the max CC time is 400ms ;the sum of DET+CC time maybe over 500ms.

         please check it ,thank you.

  • 0 in reply to jingjing liu
    TI__Intellectual 1480 points

    Hi Jingjing, 

    You're correct. When I ran this test on my end, I noticed that the result of Test: det_cc always shows Presumed_CC_DET_SEQ as 1. The value of Presumed_CC_DET_SEQ  determines which det_time tests are performed. Det+CC_Time test should only be performed if Presumed_CC_DET_SEQ = 2. 

    Here are my results with the TPS23881EVM-008 board running SRAM v07: 

    I will reach out to Sifos to understand how Presumed_CC_DET_SEQ is calculated. 

    Regards,

    Sai Gunda

  • 0 in reply to Sai Gunda
    Prodigy 40 points

    Hi Sai,

            Our test results are same with yours.There are eigt ports of BT.The Det+CC_Time reslut of the eight ports are shown as the picture.

            When  the value of Presumed_CC_DET_SEQ =1 ,the reslut of Det+CC_Time is below 200ms;When  the value of Presumed_CC_DET_SEQ =2 ,the reslut of Det+CC_Time is over 700ms.

            please check how Presumed_CC_DET_SEQ is calculated as soon as possible. Can we change the Presumed_CC_DET_SEQ?

            

  • 0 in reply to jingjing liu
    TI__Intellectual 1480 points

    Hi Jingjing, 

    I heard back from Sifos and the TPS23881 should always show Presumed_CC_DET_SEQ =1. It looks like the calculation of the Presumed_CC_DET_SEQ is very involved and performed by the PSA software. I suspect there is noise on the detection waveform and I would like to take a closer look at the Sifos report, specifically the results of your det_v test. I have sent you a friend request and would like to continue debugging this issue via email. 

    Regards,

    Sai Gunda