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BQ76PL455A-Q1: [SLUSC51C] 7.3.12.4 Fault Latching

Part Number: BQ76PL455A-Q1


Dear Sir,

The DEVCONFIG[UNLATCHED_FAULT] bit, when set, prevents the latching of fault bits in the followingregisters:
• FAULT_OV—Overvoltage VSENSE ADC limit exceeded
• FAULT_2OV—Overvoltage VSENSE secondary protection comparator limit exceeded

We set [UNLATCHED_FAULT] bit to try FAULT_OV and FAULT_2OV in our board.

Our cell voltage is about 3.3V

for FAULT_OV

1.Set CELL_OV 0x90–91 (144–145) Cell Overvoltage Threshold as 0x6148 = 1.9V

2.Found FAULT_N signal from high to low

3.Set CELL_OV 0x90–91 (144–145) Cell Overvoltage Threshold as 0xD1EC = 4.1V

4.Found FAULT_N signal from low to high

for FAULT_2OV

1.Set COMP_OV 0x8D (141) Comparator Overvoltage Threshold as 0x50 = 3V

2.Found FAULT_N signal from high to low

3.Set COMP_OV 0x8D (141) Comparator Overvoltage Threshold as 0xFE= 5.175V

4.Found FAULT_N signal is still low

5.Set FAULT_SUM 0x52–53 (82–83) Fault Summary as 0xFFC0 to clear FAULT

6.Found FAULT_N signal from low to high

Could you please help us to explain why we must clear fault for FAULT_2OV, but we don't need to clear fault for FAULT_OV?

Thanks!!

Wawafish