LMZM23601V3EVM: Application Note - SLPA015- Thermal Vias

Hi Harrison Overturf,

Thanks for your quick response and explanation, but it is is not the point of my question.

I understand that single via have thermal resistance around 100C/W and it is significant compared to pcb top to bottom resistance, which is around 10C/W. 

The point is that in SLPA015 Application Note in section 3.4 add parallel thermal resistance form vias in serial to other thermal resistance sources. The wrong conclusion can be made, that vias only increase thermal resistance and is no point to use them. I'm sure this is wrong conclusion.

In my opinion parallel thermal resistance from vias should be firstly add in parallel to top to bottom board thermal resistance. Then add to the rest of thermal resistance sources. In that case vias will reduce top to bottom board thermal resistance and decrees total thermal resistance.

Is may reflection correct?

Best regards,

Hi Adam, 

You bring up a good point, let me reach out to the author of this paper to confirm. Please expect a reply in 1-2 business days. 

Regards,

Harrison Overturf 

Hello Adam,

Your conclusion that thermal VIAs are NOT required to dissipate heat efficiently is correct, however they do help out.

Looking at the “LM5069EVM-627 Evaluation Kit” example from Figure 7:
- You can see that the MOSFET is just floating over the ground pour on the bottom layer, no thermal VIAs exist.
- Most of the heat gets transferred to the bottom side, but there is a “loss” in the heat transfer across the board of 10oC/W.
- For example if you are dissipating 2W of power, you would expect the bottom layer to be approximately 20oC cooler than the topside.

What we can see from “LMZM23601V3EVM Evaluation Kit” example is that where your VIAs are located matters:
- The solution uses 3 VIAs right under the component (shown in red rectangle), but also has 6 more VIAs further away (show in blue).
- When we run the calculations, the heat transfer is as if there were 5 VIAs right under the IC (versus 3 close by and 6 more not as close by).
- So yes the thermal VIAs are providing some benefit to the thermal relief of the DC/DC switcher. 
- The thermal impedance of VIAs are added up in parallel.
- marked up image below with zoom-in under the IC showing the location of all 9 thermal VIAs

Best regards, Keith

Hi Keith,

Thank you for response, but I'm worry it is not answerer to my question. I not conclude that thermal vias do not work or are useless, but the thermal calculation form  SLPA015 AN section 3.4 could be incorrect. 

Lets consider example 3.4 in two variants: with and without thermal vias. 

In section 3.3 is example without vias.  IC temperature was estimated by adding ambient temperature, area of both planes and thermal resistance of PCB.  If we will use the same strategy to example 3.4 and remove thermal vias, we can calculate IC temperature:

AMBIENT =16.1C*

PCB=6.3C*

AREA=19.7C*

IC_temp_vithout_vias = AMBIENT + PCB + AREA =16.1+6.3+19.7=42.1C

Below are calculation for solution with vias.

AMBIENT =16.1C*

PCB=6.3C*

AREA=19.7C*

VIAS=29.7C*

IC_temp_vith_vias = AMBIENT + PCB + AREA +VIAS=16.1+6.3+19.7+29.7=71.8C

*values are taken from Section 3.4 of SLPA015 AN

The calculation shows that  IC_temp_without_vias=42.1C  is  much lower than IC_temp_with_vias=71.7C and we should expect "twice worst" solution with thermal vias than without. I am sure its wrong.  I expected, that vias will reduce IC temperature, maybe not to much but they should.

The question is why my expectation not match to the equations or what is wrong with my conclusions?

Best regards,

Adam

Hello,

The 42.1 degree Celsius mentioned in the calculation is the temperature of the PCB next to the IC package.

What I'm trying to convey is that the calculations are a little off because we have 9 VIAs conducting heat:  3 VIAs are directly under the package and 6 are shifted above and below but further away.  These additional 6 VIAs add some thermal benefit, but not as much as if they were directly under the package.

Best regards, Keith

Hi Keith,

Keith Keller said:

The 42.1 degree Celsius mentioned in the calculation is the temperature of the PCB next to the IC package.

If so, temperature calculated with thermal vias (71.8C)  is also the temperature of the PCB next to the IC package. Is it not strange to you that using your simplify equation  the IC temperature(or next to IC package) is higher with thermal vias than without?

Keith Keller said:

What I'm trying to convey is that the calculations are a little off because we have 9 VIAs conducting heat:  3 VIAs are directly under the package and 6 are shifted above and below but further away.  These additional 6 VIAs add some thermal benefit, but not as much as if they were directly under the package.

I notice that more vias farer form chip could be approximately equal to less vias direct under the chip. I also understand that this calculation are simplify and we should expect some variation of the results.  It was clearly point out  and I have not doubts about it.

What I would like to get to know is how to estimate impact of thermal vias to the temperature a IC? What will be the difference in temperature of IC with and without thermal vias, if all other parameters are the same?

Could you explain it to me using simple example describe below? 

Lets consider a IC with power loss 1W mounted on two layers PCB 1.5mm FR4  2oz cooper. Top area is 0.5in^2  and bottom is 1.5in^2. 

How estimate the temperature of IC in three cases:

1. Without thermal vias

2. With 1 thermal vias  direct under the chip.

3. With 10 thermal vias  direct under the chip.

Thermal resistance of chip can be ignored.

Best regards,

Adam