UCC5870-Q1: Synchronization issue for SPI lines.

Puneet Mathur

Part Number: UCC5870-Q1

Hello,

We are using the gate drivers in independent slave configuration.

Clock frequency 1 MHz.

We are facing some issue in synchronization of all 4 SPI lines. For instance, the MISO line is lagging from the Chip select pin by 2.5uS and for some commands the MOSI triggers before the clock pulses.

Synchronous SPI communication is used here.

over 3 years ago

0 Daniel Norwood over 3 years ago

TI__Expert 6001 points

Hello Puneet,

Thank you for reaching out on E2E.

Could you provide a bit more information to help me understand the problem?

Both the CLK and MOSI should be driven by the MCU, so the problem with MOSI pulling low before the clock sounds like incorrect MCU logic.

For the delay in MISO, when this occurs have you what commands are you sending? Could you provide a picture similar to the one above showing the full 16 bit data frame?

Regards,

Daniel

0 Puneet Mathur over 3 years ago in reply to Daniel Norwood

Prodigy 30 points

Hello Daniel,

This is for most of the commands.

Regards,

Puneet

0 Daniel Norwood over 3 years ago in reply to Puneet Mathur

TI__Expert 6001 points

Hi Puneet,

From these waveforms it looks like MISO is working properly, returning the value at register position 0 (CFG 1, default value 0x0C00) each time chip select pulls low. This suggest the driver is responding correctly to the commands it receives.

It looks like the problem is the timing of the MOSI connection, which is controlled by the MCU. What MCU are you using? If you probe directly at the MCU pins does the MOSI connection line up with the clock?

Regards,

Daniel

0 Puneet Mathur over 3 years ago in reply to Daniel Norwood

Prodigy 30 points

Hello,

we are using Infineon AURIX TC387.

Regards,

Puneet

0 Daniel Norwood over 3 years ago in reply to Puneet Mathur

TI__Expert 6001 points

Hi Puneet,

THank you for the information. Have you been able to test the SPI signal directly at the MCU? If you disconnect the MCU from the gate driver, is the CLK and MOSI properly aligned?

Regards,

Daniel

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UCC5870-Q1: Synchronization issue for SPI lines.