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TPS7B4253-Q1: a non-monotonic startup

Part Number: TPS7B4253-Q1

Hi team,

My customer met a question in using TPS7B4253QDDARQ1. They want us to give explain about a non-monotonic startup and get rid of non-monotonic startup.

The circuit schematic is as follows

1.Design parameters. Vin=6V, Vout=5V.

2.In the case of 5V OUT without load, there is a step to measure the instantaneous waveform of power-on. (Vin=6V The 12V is referenced to the ADJ through a voltage divider)

3.Remove Z110, Z41, disconnect F2, short FB and OUT pins in turn and there is no improvement, please help confirm the cause and improvement measures.

B R 

Sveinn

  • Hi Sveinn,

    This has the possibility to be due to an internal node turning on and switching over the passfet driver and/or drawing additional current pushing the tracking voltage that the device sees to be lower for a brief period causing the device to switch off before recovering. I was a close contact for COVID, so I will see if someone else can get in the lab to see if we can replicate the behavior on our end

    Regards,

    John

  • HI Sveinn,

    Another one of the engineers has run the test in the lab on our EVM, this means that cap values differ from your design a little, and so speed of waveforms are a little different, however they have found that the non-monotonic startup is something that is seen on the device in normal operation, so it is not a problem with the design.

    I will see if by delaying the ADJ voltage pin the non-monotonic behavior goes away. Another option would be to slow down the slew rate of VIN and/or the ADJ pin voltage. I will get back to you on possible other avenues for removing the behavior

    Regards,

    John

  • Hi Sveinn,

    By slowly ramping the VADJ voltage, I find that the non-monotonic behavior disappears.

    The test was performed by supplying 12V at the input and EN pin while grounding VADJ. Then VADJ was ramped slowly until turn on.

    Now the device overshoots once the Vadj gets to a high enough level, it then regulates back down to VADJ and follows it until it reaches its final DC setpoint.

    Regards,

    John

  • Hi John,

    Thank you very much for your timely support and reply.

    I Still have two more questions

    1.My customer is using TPS7B4253QDDARQ1 without EN pin. Does the above method also apply?

    2.By slowly ramping the VADJ voltage, can I achieve this by connecting capacitors in parallel with the lower resistor.

    Also, can you show the waveform graph you tested?

    Thanks.

    B R

    Sveinn

  • Hi Sveinn,

    1. Yes, I tested the device without driving the enable seperately, which is simulating the device with no enable functionality as this is how that device works, being powered on once power is applied to the device using VIN.

    2. I do not see anything inherently wrong with placing a cap on the ADJ pin, in fact, we recommend for robustness on Line transients to place a cap close to the device at the ADJ pin.

    Zoomed on overshoot/catchup to VADJ:

     

    Slow VADJ following tracker:

    Regards,

    John