• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 428 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ77915: Schematic design review

Danilo A.
Mastermind 26830 points
Part Number: BQ77915

Hi Team,

Our customer would like to ask your help to review the schematic diagram of his BQ77915 battery balancer design. His application is 4S li-ion battery pack and here is the schematic diagram. 

5751.Capture.pdf

Regards,

Danilo

  • 0
    TI__Expert 8526 points

    Hi Danilo,

    The schematic looks good for the most part, but there are a couple things I noticed: 

    • The default recommended DSG FET gate resistor (R29) value is 4.5 kOhm.  This value can vary to adjust the rise and fall times of the FET, but if the resistor value is too low, very fast switching occurs.  Fast switching of DSG FET with high current can produce a large inductive spike.  Ensure that 1kOhm is the value your customer wants and not just a value they chose to match the CHG gate resistor.
    • The cell connections for VC0 and VC1 are a bit confusing, and they look incorrect.  Right now, it looks like your customer has a wire shorting one of their cells.  Please ask your customer to revisit this part of their schematic and refer to Figure 9-12 in the BQ77915 datasheet.  I will include an image of the example schematic below:

    Best,

    Andria