TPS546D24A: transient spec failed

Fred Cheng 

The Provided Oscilloscope waveform shows passing a 3.3V +/- 5% ( 3.135 - 3.465) specification, including both ripple and transient, and that is under a load transient 2 1/2 times higher than the 6.6A transient that was provided in the XLS design document.

If you can advise what the actual specification is, in terms of transient current amplitude, and allowable output voltage deflection, I can help provide a recommendation.

You can try Compensation Code 29, but this places the cross-over right at the POSCAP ESR-zero / Inductor MLCC-resonance cross-over where the slope of the loop gain is flat making the loop's stability and bandwidth susceptible to large variations due to layout parasitics and component variations.

Fred Cheng 

The "Load Step / Load Release Transient Current" is the amplitude of the Load Step (Increase) or Load Release (Decrease) in the loading current.

If the load step / load release is 30% - 100% and 100% to 30% then it would be 70% of the full load current, or 14A

Based on meeting a <165mV overshoot and undershoot on a 14A dynamic load change  (11.7mΩ output impedance) I would recommend pin programmable Compensation Code 29 rather than Compensation Code 28.  Compensation Code 28 provided enough voltage loop gain to meet the 165mV over/under shoot with a 6.6A transient but is not sufficient to meet that with a 14A transient.  Compensation Code 29 should be able to meet the 165mV transient, though the margin is relatively small.

If they need additional margin, they may need to use COMPENSATION CODE 30, but the VLOOP GAIN = 8.

I see that Compensation Code 8 is stable with 3x 330μF 9mΩ POSCAPs plus 4x 47μF MLCCs though the phase is dropping rapidly at crossover, so the gain margin is low and the design would benefit from some additional MCLL capacitors.

Fred Cheng said:

but you mentioned  "but the VLOOP GAIN = 8"    when you recommended code 30 yesterday.

Sorry, it looks like there was an errant return, and the next line finishes the thought.

but the VLOOP gain = 8.  I see that Compensation code 30 (VLOOP = 8) is stable with 3x 330μF 9mΩ POSCAPS plus 4x 47μF MLCCs, through the phase is dropping rapidly at crossover, so the gain margin is low and the design would benefit from some additional MLC Capacitors.

My apologies about that confusion.

Fred Cheng said:

and is there a reason  why we have to keep the ILOOP/VLOOP ratio in green in the excel?

When the ILOOP / VLOOP bandwidth ratio is less than 2, the phase margin in the voltage loop tends to be low, so we warn the user about this.  If they are comfortable with the low voltage-loop phase margin and its performance, an ILOOP / VLOOP ratio under 2 can be tolerated.

In multiphase applications, an ILOOP / VLOOP ratio less than 2 will also reduce the dynamic current sharing between the phases somewhat.

Fred Cheng 

The voltage loop does not have an "independent phase margin"  When you measure the outer feedback loop bode plot, you are measure the gain and phase of the voltage regulation loop.

If the measured gain and phase of the outer voltage regulation loop are acceptable, then the 2:1 ILOOP : VLOOP bandwidth guidance can be effectively dismissed.

It is the gain and phase of the inner current loop that can not be easily measured due to the difficulty in measuring switching current and the fully internal feedback of the current loop, making injecting an sine-wave into the feedback and measuring the resulting current regulation result difficult.

Fred Cheng 

The Inner Current Loop includes the GMI transconductance amplifier, it's RVI, CZI and CPI compensation, the TON generator, MOSFET drivers, MOSFETS, Inductor, which controls the TO to Switch Current transfer function,  the switch current sense on the high-side and low-side MOSFET and their current sense gain amplifier that then drives the I_SNS input to the GMI current error amplifier.

The purpose of the inner current loop is to match the averaged sensed switch current (I_SNS) to its control signal VSHARE, which sets the "reference" for the current control loop.

Fred Cheng 

When you break the feedback path, inject and monitor the feedback, you will be able to observe the Bandwidth, Gain and Phase margin of the outer voltage loop, as it is influenced by the inner current loop, but you will not be able to measure the bandwidth, gain, or phase of the inner current loop, only its influence on the outer voltage loop.

While you can see the effect that changing the inner current loop's bandwidth on the outer voltage loop with the change in high-frequency phase margin, you are not actually monitoring the current loop, just its indirect influence on the outer voltage loop.