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LMG3422R030: Avalanche energy comparison vs Si and SiC FETs

Part Number: LMG3422R030
Other Parts Discussed in Thread: LMG2610

Hi team,

Could you please provide the specific avalance energy comparison data between TI GaN and other Si and SiC FETs?

My customer would like to learn more our GaN device physics to understand how TI GaN achieves better surge immunity.

Regards,

Itoh  

  • Hello,

    To answer this question, I would like to point to our most recent datasheet for the LMG2610 device, which comments on this topic. The answer is the same for LMG3422, just not included at this time in the corresponding datasheet. Section 7.3.1 of the LMG2610 datasheet says:

     Due to the silicon FET’s long reign as the dominant power-switch technology, many designers are unaware that the nameplate drain-source voltage cannot be used as an equivalent point to compare devices across technologies. The nameplate drain-source voltage of a silicon FET is set by the avalanche breakdown voltage. The nameplate drain-source voltage of a GaN FET is set by the long term compliance to data sheet specifications.

    Exceeding the nameplate drain-source voltage of a silicon FET can lead to immediate and permanent damage. Meanwhile, the breakdown voltage of a GaN FET is much higher than the nameplate drain-source voltage. For example, the breakdown drain-source voltage of the LMG2610 GaN power FET is more than 800 V which allows the LMG2610 to operate at conditions beyond an identically nameplate rated silicon FET.

    The LMG2610 GaN power FET switching capability is explained with the assistance of Figure 7-1. The figure shows the drain-source voltage versus time for the LMG2610 GaN power FET for four distinct switch cycles in a switching application. No claim is made about the switching frequency or duty cycle. The first two cycles show normal operation and the second two cycles show operation during a rare input voltage surge. The LMG2610 GaN power FETs are intended to be turned on in either zero-voltage switching (ZVS) or discontinuous-conduction mode (DCM) switching conditions.

    To reiterate, this also applies for the LMG3422 devices, please let me know if you have any further questions.

    Regards,

    Zach

  • Hi Zach-san,

    Thank you for your comment.

    I’m afraid but you are not really answering my question.

    My customer is asking about the avalanche energy EAS, which is defined in the competitor’s app note.

     

    https://www.infineon.com/dgdl/an-1005.pdf#page=9

     

    Do we have specific comparison between GaN, Si and SiC in terms of EAS?

     

    Best regards,

    Itoh

  • Hello Itoh,

    A direct avalanche comparison between our GaN and other semiconductors like Si and SiC is unfortunately not something we have on hand, however I understand your point and would like to help answer your question. It is true the GaN FETs have a worse avalanche rating than Si, but this comparison fails to identify why we care about avalanche rating in the first place. Much of the Si avalanche rating is used to protect the device during surge events. For the same setting of a GaN FET, avalanche rating is not needed as the device has superior bus voltage rating and is able to switch through a surge. I encourage you to look at this E2E post: No Avalanche? No problem!

    So while it is true that a direct avalanche comparison does not favor GaN, the end application and protection goal far favors GaN in the end.

    Regards,

    Zach