Other Parts Discussed in Thread: TPS65381-Q1
This thread applies to all TPS65381-Q1 and TPS65381A-Q1 devices.
The VDD1 LDO controller feedback pin (VDD1_SENSE) can be used to monitor an external voltage regulator (for example an external DC/DC core rail) depending on a few factors.
- The VDD1 LDO controller needs to not be used in the system. If VDD1 is going to be used as an output regulator then an external monitor will need to be used
- The VDD1_SENSE pin can provide monitoring at +/-6% so it will need to be determined if this is acceptable for a customer system. If a specific rail needs tighter monitoring thresholds than VDD1_SENSE can provide then an external monitor will need to be used
- The NMASK_VDD1_UV_OV bit is cleared to 0 by default. This results in the OV/UV monitoring of VDD1_SENSE not having an impact on device state. Once the MCU (or other SPI controller) is booted this bit can be set to 1 to enable monitoring. The customer functional safety assumptions will need to take into account this time where monitoring is not enabled and if this is not acceptable then an external monitor will need to be used
If the system can be designed with these factors in mind then the output of the external regulator can be connected to the VDD1_SENSE pin through a resistor divider. For proper resistor divider selection please see section 6.2.2.2 of the datasheet or go to this FAQ