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TPS74801: PG pin status

? ?
Prodigy 120 points
Part Number: TPS74801

Hi ti,

   The fig 22 in datasheet shows the PG status when connect VIN, VBIAS and VEN together. 

   What is the status of PG in this situation: VBIAS = 5V and is available at first. VIN =1.8V is available behind VBIAS. VIN drives VEN with the typical RC for EN delay. 

   Does PG always keep low during VBIAS's rise up and stable 5V? Does PG always keep low start from VIN 's rise up to trigger VEN high? 

   I am trying to pull up PG to VIN and use PG to other DC/DC's EN pin for power on sequencing control. 

   

  • 0
    TI__Genius 12511 points

    Hi,

    PG pin is a comparator that pull directly from the FB node, which is tied to VOUT. So if VBIAS is rising with VIN and VEN low, then FB will not move and PG will not be pulled high. PG will only trip once the PG trippoint on FB crosses 0.9xVref. So the PG pin will only be pulled up once the VOUT is able to regulate up to 90% of its target voltage. 

    Regards,

    John

  • 0 in reply to John Schneider
    Prodigy 120 points

    Refer to datasheet, PG pin requires at least 1.1V on VBIAS to have a valid output. What is the PG status during 0<VBIAS<1.1V? 

    The PG is pulled up to VBIAS in my project and PG will trigger other PWR blocks. So that any short pulse on PG is potentially a risk in sequencing control.

  • 0 in reply to ? ?
    TI__Genius 12511 points

    Hi,

    Before a Valid state the PG pin is unknown, with VBIAS <1.1V the internal circuitry does not yet have enough power to properly sense and function the voltages necessary.

    Because output will be low in your sequencing pulling VPG high is technically possible but very unlikely as the comparator is always set to compare to the FB node itself which is a resistor divider to VOUT.

    Additionally the PG does not have a capacitive or drive force internally, so even if sequencing is trying to turn on and PG is pulled high erroneously, any downstream system trying to pull for an enable will collapse the signal until it is properly pulled up.

    Regards,

    John

  • 0 in reply to John Schneider
    Prodigy 120 points

    I just found SLVA349 and SLVA355A. It pulls up PG to VBIAS. All the LDOs are powered by single 5V. 

    PG waveform are not present in reports. The outputs' ramp up follows the sequencing requirement.

    Is it because with VBIAS and VIN<1.1V, the 74801 has no capability to generate target output? It keeps output low during <1.1V.  So that, the PG during undefined status is not sensitive to the EN control of downstream LDOs.

    Is my understanding correct? 

  • +1 in reply to ? ?
    TI__Genius 12511 points

    When VBIAS is below the 1.1V UVLO, then the internal Error AMP, bandgap, and compensation do not have sufficient voltage across their transistors to power on properly, so the device does not turn on or function as the internal circuitry is not provided power to pull anything on. So yes, the device is unable to generate an output voltage at this time, so the PG status is unable to be forced high.

    Regards,

    John