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TPS25990: EFUSE shutdown @ 10.8V

Part Number: TPS25990

Hi,

Efuse in our design is shut down immediately when its input of 12 volts falls below 10.8 volts. We are expecting the under-voltage shutdown to happen only after 12V falls below 4.5V.

In the datasheet, we have noticed the UV thresholds for the following pins: VDD and VIN: 10.8V (default; can be rewritten through PMBUS access) and 4.22V, respectively.

We have on board resistor divider R1=12.1K and R2=4.7K to set the UVLO threshold @ 4.5V.

We tried even after changing the VIN_UV_FLT register value to 0x38 (4.32V) instead of 0x8D (10.8V), but the issue still persists. Please assist us in resolving this matter as soon as possible.

Thanks,

Veeramanikandan

  • Hi Veeramanikandan,

    Thanks for reaching out.

    Please follow the below steps to update the VIN_UV_FLT (59h) register.

    1. Disable the WRITE_PROTECT by writing 0xA2 at the 10h register,
    2. Write 0x38h at VIN_UV_FLT (59h) register,
    3. Enable the WRITE_PROTECT by writing 0x00 at the 10h register,
    4. Read VIN_UV_FLT (59h) register and make sure it shows 0x38h.

    Please note that only the configuration register is being updated not the NVM with these above steps. As the NVM is not updated, the configuration registers will go to their default values in the event of input power recycle. 

  • Thanks, Avishek, 

    Now we are able to change the above register settings. But we need to do the same in NVM.  Can you please let us know the procedure for the same?

  • Hi Veeramanikandan,

    Please follow the below steps in order to burn the NVM.

    1) Apply a power supply in the range of 10 V to 13 V at VDD. If VIN and VDD are connected through a RC filter, power supply needs to be connected at VIN.   

    2) Disable the WRITE_PROTECT by writing 0xA2 at the 10h register,

    3) Import the configuration file into the configuration registers in the particular device intended to program by selecting its address,

    4) Read the 7Fh register and make sure CONFIG_NVM_STAT (BIT 0) is not set to 1.

    5) Send the STORE_USER_ALL (15h) command to burn the NVM with the configuration registers.

    6) Enable the WRITE_PROTECT by writing 0x00 at the 10h register,

    7) Read 7Eh and check whether STORE_FAIL (BIT 2) is 0 or 1, 

    8) Do input power recycling (both VDD and VIN) and read the configuration registers.

  • Hi Avishek,

    Is there any Limitation to the writing cycle count on NVM?

  • Yes... two times only.