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CSD95410RRB: TAO Output Capacitance Loading

Cosmin P
Intellectual 1650 points
Part Number: CSD95410RRB
Other Parts Discussed in Thread: TPS536C7, TPS53688, CSD, CSD95430

Hello,

For the CSD95410, CSD95495 etc the datasheet specifies for the TAO output a maximum capacitive loading of up to 470pF.
However, controllers as TPS546C7 and alike recommend the PowerStage TAO output to have a caoacitor placeholder for a 1nF while the controller  xTSEN input to be noise decoupled with a 2.2nF capacitor.
Worst case, a 12PH design can end up with 15nF capacitance on the TAO line driven by the highest temperature PowerStage.

What is the actual PowerStage capacitance drive limitation?
Stabbility?

Can the controller / PowerStage datasheet be aligned ?

Thank you

  • 0
    TI__Expert 8960 points

    Hi Cosmin,

    Where in the datasheet are you seeing this? I see in the TPS536C7 datasheet a single 1nF cap at the ATSEN input.

    Thanks,

    Travis

  • 0 in reply to Travis Williams
    TI__Intellectual 1650 points

    Hi Travis,

    TPS536C7 SLLUSDI9 Sept2020, 7.4.10 on page 43 
    TPS53688  SLUSCY8 Sept2020, 8.4.8 page 50

    EVMs I se have 100pF at the CSD and 1nF at the controller, none comply with 470pFmax - if this is the limit the single 470pF should be at the controller pin

    Thank you

  • 0 in reply to Cosmin P
    TI__Expert 8960 points

    Hi Cosmin,

    I'd go with the controller datasheet recommendation of 1.0-2.2nF at controller + option of cap at power stage. I have never seen a case of too much capacitance on the TSEN line causing a problem. That being said, I don't know what the true limit is. If its important, I can ask the power stage people to check this early January.

    Thanks,

    Travis

  • 0 in reply to Travis Williams
    TI__Intellectual 1650 points

    Hi Travis,

    Understood, I had the same thinking until now when the capability to use 12 phases in drive=ing up to 4x CSD95430 power stages per phase underlines the need to look into and understand the power stages actual limitation - it can become a valid design qualification item in the paper trail.

    Although 'pushing' the C7 in a 48 power stages design is likely a theoretical scenario, a 10 phases design driving 20 power stages is an actual application. 

    So please go ahead with the investigation in the new year.

    Happy Holidays and New Year!

  • 0 in reply to Cosmin P
    TI__Genius 11095 points

    Hi Cosmin, happy new year. 

    There is not a stability limitation on the TAO drive capacitance per se. This recommendation is so that the power stage can drive up TAO quickly for fault reporting. The controller will recognize the fault within ~250ns of TAO > 2.5V. The internal pullup in CSD95410 is about 110 ohms to 3.3V.