TPS65987D:How many reflows are allowed?

Hi Oyama-san,

Can you elaborate what you mean by reflows, are you referring to the soldering process or something else?

Please note due to holidays, there may be delay in responses. 

Thanks and Regards,

Raymond Lin

Hi Raymond-san,

Sorry for the omission.
Reflow meant reflow soldering.

Now, we placed the TPS65987D on PCB A-side that will be soldered first.

Therefore, the PCB is reflow soldered again upside down in next process.  At least the the TPS65987 goes through the reflow soldering process twice.

For example, TI's Application Report SPRABY1A say  it can be reflowed soldering 3 times.

However I wasn't sure if the TPS65987D would follow this report. 

Please also explain which documents explain the reflow soldering conditions for the TPS65987D and the relations between them.

Best Regards,

Yukio Oyama

Hi Raymond-san,

Thanks for the document referral. The document you show says it follows JEDEC J-STD-020 and that is 3 reflow soldering times.

However, I am not sure that QFN applies to all QFNs or MSL to all MSL. In other words, I fear that certain products may be excluded from this document. Therefore, I would like to know by what the document is associated with TPS65987D.

I await your additional checking.

Best Regards,

Yukio Oyama

Hello Oyama-san,

Raymond is out of office due to holidays. We will check and provide you the details early next week. 

Thank you for your patience. 

Regards,

Rohit.

Hello Matthew-san,

Thanks for the explanation.

I understood that all TI devices follow JEDEC standards.
I understood that TPS65987D would follow "MSL Ratings and Reflow Profiles (SPRABY1A)". Correct me if I am wrong.

Best Regards,

Yukio Oyama

Hi Raymond-san,

Thanks for your info.

From those information I found that it complies with the JEDEC standard.

That's a big help. Thank you.

Best Regards,

Yukio Oyama