TPS568215: spike issue

Hi Fred,

I think the spike may not the true Vout waveform but may be influenced by the probe loop.

You can try to use the pig tail on the scope probe and directly test the both sides of a output capacitor.

Please let me know if the spike still reserves.

Hi Athos,

we'll check, however I think differently.

since they use 6 TPS568215, only these two have this spike.

so I think their measurement method is the same.

for example this 0.75V doesn't have spike.

Hi Fred,

Just to confirm, is this waveform above the voltage of Vout or FB?

If it's output voltage, I don't think the spike is related to the layout.

FB too close to SW may influence the loop but not the output ripple.

Please let our customer test the SW waveform in the meantime if possible. 

Thank you!

Hi  Athos,

you're right.

the SW pulse is aligned with the spike in Vout,

is this the inductor materiel problem that cause EMI?

how can we fix this, thanks

Hi Fred,

I'll check it and reply you next Tuesday.

Hi Fred,

I think we should firstly ensure the method of measurement is correct to confirm the spike is truly output voltage or injected by the probe.

Do not test GND at a remote point.

Just change some pairs of test points using the pig tail on the scope probe as the above picture, such as directly test the both sides of a output capacitor or test point close to the inductor.

Remember not to test SW voltage in the meantime to avoid the coupling from the probe.

If the spike still remains, please show me the result and let's see if there're some risks of layout.

Hi Fred,

they used pig tail on the scope probe and directly test the both sides of a output capacitor.

but they tested SW at the same time,

I'll tell them to remove it and see if this helps, thanks

would you help explain why probe SW at the same time would couple the SW noise?

Hi Fred,

Thank you for your quick feedback.

You can also advise our customer to change another capacitor and try again to see if the spike is the same.

The probe is sharing the same GND and SW voltage is much larger than the output ripple, so probing SW at the same time may couple some SW noise from GND.

If the duty is low, the phenomenon is more obvious but it's not the true output ripple.

Hi Athos,

update more waveform,

this time they doesn't probe SW but only Vout (pig tail), 

one at DC/DC side, the other at load chip side.

as you can see there's still a small spike there,

what could be the last potential cause? ESR? ESL?

.

.

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DC/DC side:

CPU side:

the green is the power rail, you can see the distance between power and CPU side.

Hi  Athos,

what is space coupling, would you elaborate the detail for me ?

and why bottom side would avoid this?

Hi Athos,

by spacing, you mean EMI?

since they don't probe SW now, so the noise come from electromagnetive wave pick up?

is that what you mean?

got it,

looks like the loop of probe has pickup the noise,

will update you after they test on the other side of the board, thanks

Hi Fred,

Okay, looking forward to your update.

Hi Athos,

turns out that the switching noise is "not that obvious" now at bottom side, but the voltage ripple level is still about same as the top layer.

they try to add 22uF MLCC but doesn't help, do you think we should add 0.1uF instead to further minimize ripple?

Hi Athos,

you said add extra output cap would help, but they try extra 22uF but on much change.

may I know why?

do you think is because 8mV is dominated by noise instead of true ripple , so the improvement is not obvious?