We are trying to control the DDSG and DCHG outputs that are driving the low-side FET driver circuit in our design. Unfortunatly we can't make it work. We assume that it could be caused by a proper register setting of the BQ76952 however we can't find what we are missing. Otherwise, it might be a hardware issue which is also not obvious to us.
When we enable the "Test mode", the DDSG_PIN and DCHG_PIN bits in the FET status are toggled but no change in the BQ76952 DDSG and DCHG outputs.
We also confirm that the 2 signals CFETOFF and DFETOFF are not working when we send pulses from the MCU.
Attached are all settings we use with highlighted yellow color the settings that seem to affect the DCHG/DDSG functionality. Let us know what might be wrong.
[1] Settings:
BQ76952_Parametrs-DDSG-DCHG.xlsx
[2] Schematic:
1031.SCH.pdf