It looks like you add a capacitor to the CT pin, and that sets the delay from when input passes threshold to when the output changes.
It seems the CT charge current is 220nA? This seems quite small...
If there is any contamination on the board where say there becomes a 5MΩ parasitic path to GND from the CT pin, then 220nA * 5MΩ = 1.1V drop
This keeps us from getting to our output required threshold, and there would be no output from the device.
It seems in our (customer) in-house testing that just moving from -10C to 70C causes condensation that affects the output - sometimes never toggling.
To avoid this, we (customer) are considering a voltage divider from VDD, connected to the CT cap, so that at the very least, the device will be able to transition CT past it's "High" required threshold.
Is there any comment we (TI) could provide regarding how to calculate the reset timings in such a use-case?
By the way, fixing the CT pin to VDD through a 20~100kΩ resistor causes a typ300[ms] reset time; and we wish to use the resistor-divider to adjust this value.
