Hi TI support,
Does LP87561 support AVS controlled by the load (a CPU) using a 200 Ohms inserted between feedback pin FB_B0 and load ?
Regards
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Hi TI support,
Does LP87561 support AVS controlled by the load (a CPU) using a 200 Ohms inserted between feedback pin FB_B0 and load ?
Regards
Hi Ioan,
No. AVS is intended to be done over I2C by writing corresponding BUCK VOUT register.
Br, Jari
Hi Ioan,
LP87561-Q1 supports AVS through I2C writes. The MCU must write to the output voltage registers BUCKx_VSET on the PMIC. The PMIC will then scale up or down to that new target voltage following the defined slew rate setting.
In addition, LP87561-Q1 supports roof/floor voltage control where the output voltage can be switched between two different output voltages using one of the pins.
BR,
Samuli
I would call the method you suggested as DVS. I understand that DVS is the TI recommended way to control the voltage but is not applicable to the ASIC/CPU I'm using.
The ASIC/CPU I'm using has proprietary (and undocumented) method ,"hardcoded" in silicon, where it wants to do analog trimming/adjusting in the feedback loop to change the nominal voltage of 0.8V by +/- 0.2V as it sees it fit for the operating conditions.
Does LP87561-Q1 allow this "analog" trimming of the feedback loop ?
Regards
Hi Ioan,
Unfortunately this is not possible. The previously described methods are the only supported ways to scale the output voltage.
BR,
Samuli