TPS65988: Difference in VBUS release delay between 1port and 8port chipset

Hi Sai,

Is there any difference in the external circuitry around the PPHV or VBUS pins?

Sai Mukhesh said:

In the dual port controller we are seeing a additional delay of around 300ms for the VBUS release

Could you explain more about the event you are describing. Is this delay occurring when you disconnect VBUS from PPHV? Can you describe what events occur and expected results/timings? (ie. We send a "disc" command to the 987, we expect it to disconnect in XXX ms. It is disconnecting in YYY ms. the 987 disconnects in YYY while the 988 disconnects in XXX.)

If you do not mind explaining, it may help to know more about the moisture sensing mechanism if it might be affecting timing.

From the datasheets, I do not see any major differences between the power switching characteristics. I'll speak to team members internally for more information once you get back to me.

Thanks and Regards,

Chris

Hi christoper,

Thanks for your reply.

The delay that i mentioned is observed during a plug event. When the plug event happens we are enabling the switcher which generates the 5V and there is a delay is observed between the voltage availability on the PP_HV1 and VBUS1.

For the 987 the delay is around 18ms

For the 988 the delay is around 340ms.

Please let me know if any other data is required.

Hi Sai,

Is there any difference in the external circuitry near these pins between the two designs? Differences in impedance on the pins could have some effect.

What voltage contract are you negotiating on VBUS?

Sai Mukhesh said:

there is a delay is observed between the voltage availability on the PP_HV1 and VBUS1.

Just to make sure I understand this correctly.

1. Device is connected on USB-C
2. Voltage is seen on VBUS
3. Delay we are concerned about
4. Voltage appears on PP_HV

One setting that you can check or adjust within the GUI is the Soft Start Slew Rate. This could be affecting the delay that you are seeing.

Thanks and Regards,

Chris

Hi Christoper,

Whether the check and uncheck of externally powered in the port settings affects any delay? Currently we are providing external power to both chipsets from a 3.3V switcher. But , for one chipset i.e 988 bin we have checked the Externally powered (in which we are seeing more delay in VBUS release) and for the other one i.e 987 we have unchecked the externally powered(in which we are seeing less delayed in VBUS release).

Hi Sai,

Let me look into this.

Thanks and Regards,

Chris

Hi Christopher,

Can you please let us know if there is any update.

Also when I was checking at the GUI I found an another difference on the configuration file version.

For the 987 part is 6.1.2 and for the 988 part it is 6.1.1. Can you please let us know what is this actually and whether it can make any difference in the functionality.

Hi Sai,

After talking to a systems engineer, there should not be a difference between the timing between the two devices. Do you see this timing difference consistently on all of your 987 and 988 PD controllers?

Can you provide scope captures of the VBUS and PPHV showing the timing issues you are seeing?

Sai Mukhesh said:

For the 987 part is 6.1.2 and for the 988 part it is 6.1.1. Can you please let us know what is this actually and whether it can make any difference in the functionality.

The latest GUI version is 6.1.3, and will have the latest firmware patches. I would recommend moving to the latest firmware as it will have the latest bug fixes. You can find it on the ti.com product page.

https://www.ti.com/product/TPS65987D

Thanks and Regards,

Chris

Hi cristoper,

Thanks for your reply. Currently i am checking with the 6.1.3 verison of GUI. 

Apart from that please find the images of the probed waveforms.

Thanks Sai,

Please give us time to look it over and test on EVMs.

Thanks and Regards,

Chris

Hi Sai,

Are you using different projects between the two EVMs?

We noticed that there is activity on the CC lines during the "delay", which indicates that the 988 may be in a slightly different configuration.

Can you share the pjt files you are using. Please see if there are any differences between the two projects at the "Type-C supported options" in Port Configuration.

Also, are these being tested with the same load?

Thanks and Regards,

Chris