TPS23881: On Doing Link-Flap,Sometimes PD is not coming up after plug-in.

AYUSH RAJ

Part Number: TPS23881

Hi,
https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1136055/tps23881-with-0x7-firmware-version-we-are-not-receiving-interrupt-when-pd-is-connected-back-in-semi-auto-mode/4220080#4220080

As per the procedure suggested in above link for powering PD in Semi Auto mode, we have implemented writing 0x80 on 0x1a. Which clears interrupt register, event registers and releases the INT pin.
we have implemented writing 0xff on 0x14 to re enable the detection and classification before releasing ISR.

Now,we are facing similar issue,PD is not getting powered on intermittently.

(TejNOS-EN) #show poe port 0/1

PoE port admin status.......................... PoE Enabled
PoE port operational status.................... Down
Detection status............................... Signature good
Classification status.......................... Class-4
Power consumption status(watts)................ 0.0

Intermittently,PD is not powering up after it has been plugged-out and then plugged-in again for PoE enabled port.We faced similar issue before when PD was not powering up at all ,then as per TI's suggestion to clear interrupt,we first reset 0x1a register and then set 0x14.Now,we are facing this problem intermittently(once in 5 times).
Even in this case,events are getting generated(portUp Event),so able to get interrupts but the flow breaks somewhere in between,it is not able to update power enable register(0x19),due to which power doesn't come up.

Can you help me to understand the reason for this behaviour and suggest something to fix this?
Regards
Ayush

over 2 years ago

0 Raymond Lin over 2 years ago

TI__Mastermind 34786 points

Hi Ayush,

I'm looking into this and will get back to you next week. Currently which of SRAM are you loading onto the PSE?

Thanks and Regards,

Raymond Lin

0 AYUSH RAJ over 2 years ago in reply to Raymond Lin

Prodigy 70 points

Hi Raymond,Currently I am loading latest SRAM version(07) unto the PSE.

0 Raymond Lin over 2 years ago in reply to AYUSH RAJ

TI__Mastermind 34786 points

Hi Ayush,

Did you set both DETEn and CLEn bits after loading SRAM?

Thanks and Regards,

Raymond Lin

0 AYUSH RAJ over 2 years ago in reply to Raymond Lin

Prodigy 70 points

Yes,After loading SRAM we apply poe enable for poe configured interfaces and we set 0x14 for those interfaces..

Also, we are clearing the interrupts via reset register.. that time also we are taking DET CLS backup value and setting 0x14 register with the backup value.

Regards
Ayush

0 Raymond Lin over 2 years ago in reply to AYUSH RAJ

TI__Mastermind 34786 points

Hi Ayush,

When clearing the interrupts via register 0x1a, which field did you set (i.e. CLRAIN, CLINP, RESAL, or RESP4-1)?

A couple notes for each reset type:

If you're using RESPn, register 0x14 CLEn and DETEn bits will be reset back to 0x00 and be aware of the possible time delay after using RESPn:

Regarding register 0x19, power can be reapplied to a channel in a event a channel is turned off, however detection and classification will still need to be valid.

Let me know which reset type you configure from this register so we can further assist you!

Thanks and Regards,

Raymond Lin

0 AYUSH RAJ over 2 years ago in reply to Raymond Lin

Prodigy 70 points

Hi Raymond,
Sorry about delay.
While clearing the interrupts via register 0x1a,I am setting CLRAIN field which states:

Clear all interrupts bit. Writing a 1 to CLRAIN clears all event registers and all bits in the Interrupt register. It also releases the INT pin.
Let me know if anything else you need to know.
Thanks & Regards
Ayush

0 AYUSH RAJ over 2 years ago in reply to Raymond Lin

Prodigy 70 points

0 Raymond Lin over 2 years ago in reply to AYUSH RAJ

TI__Mastermind 34786 points

Hi Ayush,

Let me look into this and get back to you by tomorrow!

Thanks and Regards,

Raymond Lin

0 AYUSH RAJ over 2 years ago in reply to Raymond Lin

Prodigy 70 points

Hi Raymond,
Can we look into the issue with little more priority as it is causing field issues.
Let me know if u need other information.
Regards
Ayush

0 Tommy Lin over 2 years ago in reply to AYUSH RAJ

TI__Mastermind 32130 points

Hi,

TI US in on holiday today, we will get back to you tomorrow when we are back in office.

Regards.

0 AYUSH RAJ over 2 years ago in reply to Tommy Lin

Prodigy 70 points

Hi Tommy,
Any Update on this issue,Are we able to get the root cause for the issue?
Regards
Ayush

0 Raymond Lin over 2 years ago in reply to AYUSH RAJ

TI__Mastermind 34786 points

Hi Ayush,

Can you get a full register dump of the PSE during each of these events:

1. PSE power on, no PD connected

2. PD connected and powered on

3. PD disconnected

4. Reconnect PD and powered on

If a full register dump is not possible, the key registers I would like to see are 0x12, 0x14, 0x01 (and corresponding interrupt registers from 0x02-0x0B), 0x29, and 0x19.

In semi-auto mode, if register 0x14 is set initially you should not need to reset it upon PD reconnection. In the previous case, 0x14 wasn't set during boot-up which is why the PSE was unable to go through detection and classification properly.

Thanks and Regards,

Raymond Lin

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TPS23881: On Doing Link-Flap,Sometimes PD is not coming up after plug-in.