UCD90120A: Override pre-programmed power sequencing during run time

Jim Tsan

Part Number: UCD90120A

Hi Sir,

The power on/off sequence of our product is configured by TI's GUI tool and programm into UCD

In some case we want to modify the behavior of one of power rail enable to force it on even previous power rail is non-available via PMBus command without modifying UCD image.

Is it possible? and how to do it?

Another question: we just check the GPO_CONFIG(F8h) setup via PMBus command, but can't find and related setup with the pre-programmed image.

For example, here we configured P1V8(Rail#8) is one of the input source of the AND gate, but the reading output of GPO_CONFIG(F8h) is "15 3e 86 00 00 00 00 04 00 00 00 00 00 00 00 00"

Except the PAGE configuration, is there anything I need to setup before accessing?

Thanks,
Jim

over 1 year ago

0 yihe over 1 year ago

TI__Guru 60800 points

1. yes, you manually toggle the EN pin. please follow this application notes:

https://www.ti.com/lit/pdf/sluaal1

2. we do not recommend customer to configure via PMBUS_COMMAND directly since it is so complicated. GUI shall be used by customer. The command has been described in the following document: https://www.ti.com/lit/pdf/slvu352

Regards

Yihe

0 Blake Kuo over 1 year ago in reply to yihe

Intellectual 290 points

Hi Yihe,

I trird to have a configuration that can delay P2V5(Pin 20 GPIO8) some time after trigger P3V3 Fault Shutdown.

But it's not work in current configuration settings. Do I need to do some special settings ?

Could you help to give me some suggestions about it ?

UCD90120A 2.3.4.0 Address 52 Project File_NCP1-1_PVT_R03_20201202_P2V5 Off2.xml

0 Blake Kuo over 1 year ago in reply to Blake Kuo

Intellectual 290 points

Hi Yihe,

I think that my configuration settings meet the flow chart and it should work normally as we expected. Please correct me if I have something wrong.

0 yihe over 1 year ago in reply to Blake Kuo

TI__Guru 60800 points

Via reviewing your configuration file, i did not see anything wrong.

If 3V3 has UV fault, P2V5 shall be off about 100ms after 3V3 below its power_good_off threshold>

Please provide a capture to show the issue, include P2V5, 3V3, GPIO20.

Regards

Yihe

0 Blake Kuo over 1 year ago in reply to yihe

Intellectual 290 points

Hi Yihe,

Please refer to the capture as attached. We also found the Re-sequence setting is conflicated with Turn Off Delay setting.

The Power-down sequence can work normall as we aspected if we cancel the Re-sequence setting.

Please help to confirm it. We need both function in our system application.

UCD90120A_Power Down_Control_20230208.pptx

0 yihe over 1 year ago in reply to Blake Kuo

TI__Guru 60800 points

We will discuss this offline as planned.

Regards

Yihe

0 yihe over 1 year ago in reply to yihe

TI__Guru 60800 points

This has been closed, The issue is that 2V5's rail is not controlled by its ENABLE signal. so when 3V3 has UV fault, 2V5 rail is off at the same time. but the ENABLE of 2V5 is expected to de-asserted 200ms later. the resequencing interval is set to 0ms.so the resequencing starts before 2V5 ENABLE is de-asserted. The solution is to increase the interval to 300ms or larger.

Regards

Yihe

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UCD90120A: Override pre-programmed power sequencing during run time