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TPS552882: Typical current through Vcc LDO and Inductor/Capacitor values

Juan Serrano
Prodigy 100 points
Part Number: TPS552882

Hi all,

I have a couple of doubts about the TPS552882 datasheet: 

1) I have used WEBENCH for a first design, and for my specifications (Vin ~ 14V-26V, Vo = 20V, Io = 1.5A) WEBENCH tells me that the design is unstable when trying to modify the switching frequency. I can only achieve a proper design with 300kHz and 600kHz, but nothing in between, which gives me almost no flexibility in my inductor design. For 300kHz (which gives me the highest global efficiency), the inductor that I chose is 15uH and the resulting peak-to-peak inductor current ripple would be around 1A (@26Vin), which is around 68% of the nominal current. I have two concerns here: the inductor's size (which I could reduce sacrificing a bit of efficiency) and the recommended operating table (section 6.3 in the datasheet) in which the maximum "Effective inductance" is defined as 10uH. Could I then choose a 15uH inductor or would it affect somehow the performance of the converter? Also, for such low current specifications, I have calculated that I only need around 7uF effective capacitance in both the input and output of my converter, but this value is smaller than the minimum recommended Cout (10uF). Would it be really a problem? 

2) Regarding the internal LDO for VCC, I was wondering which is its typical current consumption. I'm trying to evaluate weather or not implementing an external voltage rail to supply VCC, but I must calculate the losses in the LDO beforehand. Could anyone provide this information? 

Thank you very much for your time!

Best regards,

Juan

  • 0
    TI__Mastermind 22730 points

    Hi Juan,

    Thanks for reaching out on E2E.

    1) Sorry to bring you some troubles on Webench. There should be something wrong with the Webench design. You can also design with the Calculation tool, or simulate with the PSpice model which can be both downloaded at product page. You can also post your schematic here and we can review it for your application.

    https://www.ti.com/product/TPS552882?keyMatch=TPS552882&tisearch=search-everything&usecase=GPN#design-tools-simulation

    https://www.ti.com/product/TPS55288?keyMatch=TPS55288&tisearch=search-everything&usecase=GPN#design-tools-simulation

    2) The LDO is the power for internal circuit supply and the gate driver source, the consumption also depends on the application condition, it should be less than 100mA at most cases.

    Regards,

    Bryce

  • 0 in reply to Bryce Xun
    Prodigy 100 points

    Hi Bryce, 

    Thank you for your quick reply, I will check the design tool you provided. However, I still have mainly the same doubt regarding the L/C values: 

    - The recommended inductance/capacitance values provided in Section 6.3 from the TPS522822 datasheet are really restrictive for whatever reason, or can we use L>10uH or Cout<10uF if these values are okay for us in our designs?

    Best regards,

    Juan

  • 0
    TI__Mastermind 22730 points

    Hi Juan,

    Juan Serrano said:
    I have two concerns here: the inductor's size (which I could reduce sacrificing a bit of efficiency) and the recommended operating table (section 6.3 in the datasheet) in which the maximum "Effective inductance" is defined as 10uH. Could I then choose a 15uH inductor or would it affect somehow the performance of the converter? Also, for such low current specifications, I have calculated that I only need around 7uF effective capacitance in both the input and output of my converter, but this value is smaller than the minimum recommended Cout (10uF). Would it be really a problem? 

    The recommended operating table (section 6.3) lists the value TI recommends for the correct performance of the silicon, if you chose values out of this range, then the device performance can't be guaranteed. It could show some unpredictable abnormal operation or something else.

    As for the capacitance value, does this device operate with variating loading or 1.5A loading is a constant value? I think it should also consider about the transient response which could cause output voltage undershoot/overshoot, so adding one or two capacitor NC also leave some margin for design.

    Regards,

    Bryce