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UCC5310: UCC5310MCDWV output turning low abruptly

Part Number: UCC5310

We'are using UCC5310MCDWV (wide body) gate driver for driving SiC. We've tried to follow all the recommendations and best practices for gate drivers. Output is going low abruptly. We don't have any explanation yet for the same. IN- is connected to GND.

Some of the waveforms and schematic is attached.    Can you help to solve this problem? Let us know if you need some more information.

  • Hi, Jitendra,

    Some things that can cause missing gate voltage waveforms:

    1. Noise on input signal

    2. Improper decoupling on VCC1 to GND1

    3. Improper decoupling on VCC2 to VEE2 - especially from VCC2 to VEE2 directly

    4. UVLO on VCC1 supply

    5. UVLO on VCC2 supply

    Let me know if any of these are the root cause of your problem.

    Best regards,

    Don

  • Hi Don,

    You've emphasized on direct decoupling on VCC2 to VEE2 which seems missing. What would be the good value to test with? Thanks.

    Regards,

    Jitendra

  • Hi Don, also UVLO recovery time mentioned is 30 to 50 uS while output is going low for ~100 nS. Can I rule out UVLO triggering?

  • Hi, Jitendra,

    I'd use a combo of 0.1 uF in parallel with 1 uF or 2.2 uF to see if it improves. Placed as close to the IC as possible. Any parasitic in the decoupling loop will limit its effectiveness.

    Best regards,

    Don

  • Hi, Jitendra,

    Yes, that would imply it's not the UVLO tripping.

    Best regards,

    Don

  • Hi Don, thanks.

    In addition to above, I've below observations and need your suggestions:

        - Earlier we were doing testing with signals coming from launchpad with shielded cable to power card and this was not enough. Now we did testing with control card attached directly to power board and problem of driver going low abruptly is not present. Though I'm still concerned about the noise on IN+ signal of driver. It doesn't look good to me. Also having bigger capacitor at IN+ pin means overloading MCU pin which might affect MCU reliability. What are your suggestions in this case?

        - We also individually tested low side and high side MOSFET (half-bridge module). Low side gate drive is much better with respect to high side. High side gate drive has excessive ringing. One of the potential issue might be large turn-on current loop from VDD capacitors to OUT pin to GATE and return from source to GND of capacitor. We are physically constrained to reduce the loop size and not sure how to do that. Do you have any suggestions?

        - Current capability of UCC5310MCDWV looks insufficient to drive the MOSFETs in CAB011M12FM3, can you suggest some replacement part nos?

    Regards,

    Jitendra

  • Hi Jitendra,

    I am subbing-in for Don today.

    You can put a 10Ω resistor between the MCU output and use a 1nF IN+ input capacitor. That will reduce the load on the MCU output, and make a 16MHz filter for all this noise. You might even want to use a 10Ω ferrite bead instead of a resistor for another filter pole. What is the switching frequency? Usually GPIOs can handle around 20mA. 

    Your high side OUT to GATE loop is a little stretched, but are you sure that is the reason? High side drivers are on a floating voltage, so they usually will be more noisy. I think you need a capacitor from VCC2 to VEE2. That should help clean these up a little. Are you able to add one (~100nF) to this board for an initial test and see if the issue is still present?

    Best regards,

    Sean

  • Hi Sean, thanks. switching frequency is 100 kHz.

    Yes, I added 100nF and 1uF directly between VCC2 and VEE2 before taking these results.

    Regards,

    Jitendra

  • You should try reducing your gate drive resistors first before upgrading to a larger device. I usually go by increments of 1/2 and see if it gets better or worse. Do you want to try using a 3.3 and 2.4 resistor instead of the 6.8 and 5.1 values that you now have?

  • Dear Sean, thanks for your valuable suggestions. We tested using very low value of resistor (< 1 ohm). MOSFET internal Rg is ~3 ohms.

    While switching from low to high, my observation is that gate driver OUT pin swings to +10V (VCC2: +15V, VEE2: -4V). After that rise to +15V takes some time. Also I checked power supply of gate driver simultaneously and found it to be constant.

  • Hi Jitendra,

    The output is a "hybrid pull-up structure" shown in the image of page 1 of the datasheet. The last volt is pulled up by a slower PNP. How fast does it get to 10V and how long does it take from there to get to 15? Can you send the oscilloscope image?

    10V might be enough to turn the switch on. The further decrease of resistance by increasing to 15V is minimal, so it is okay if it takes a little longer.

    Best regards,

    Sean 

  • Dear Sean, thanks for asking the right question "how are we sure about the reason". Infact, we have found much of this ringing what we observed was introduced by the probe itself. We used very small loop at probe tip and results are very different.

  • Dear Sean, below are some of the high side gate traces with Rg 3.4, 2 and 0. Can you suggest if UCC5310MCDWV fits here or should we use UCC5350MCDWV?

    Reaching to 10V is quite fast with 0 ohm but we are not sure if it is good to use 0 ohm. Does it affect the reliability of gate driver in long term?

  • Hi Jitendra,

    It looks to me like the UCC5310 with 0 ohm drives the gate fast enough, and there's not too much gate resonance. The one think to watch when using a 0 ohm gate resistor is the device temperature. The gate capacitor has to charge and discharge all of its energy times frequency. A gate resistor usually burns up most of this power, but a 0 ohm resistor means that the driver has to sink all of this energy. It is usually only a problem if you run at a high frequency and don't have good heatsinking into the PCB.

    Best regards,

    Sean 

  • Dear Sean, thanks for your suggestions.

    I did loss calculations and found it to be medium level.

    In addition to what you've suggested, one more thing in our design is that gate driver are placed in a position where there would be no air flow and high ambient temperature. Due to space constraints, area on VCC2 and VEE2 is also less. So we will do more measurements and decide.

    Regards,

    Jitendra