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TPS48111Q1EVM: FLT_I being set with all protections disabled

Keerthi Kumanan
Prodigy 10 points
Part Number: TPS48111Q1EVM

Hello, 

I have been trying to drive the capacitive load on the evaluation module with the pre-charge disabled. All the protections have been disabled as well; overcurrent, short circuit, and over temperature. The EN/UVLO is connected to Vaux. When I drive INP high whilst INP_G is low, it still sets of the FLT_I flag even though all the protections are disabled. This is what I did to disable each protection on the EVM:

Overcurrent - shorted CS+ and CS- with wire and shorted IWRN to ground with zero ohm resistor.

Short circuit - shorted ISCP ad CS- with zero ohm resistor

over temperature - removed Q6

I was wondering why this is the case and if there are other mechanisms that could set of the FLT_I flag.

Best regards, 

Keerthi

  • 0
    TI__Guru** 105361 points

    Hi Keerthi,

    Welcome to E2E!

    How much is the output capacitance ?

    As there will be huge inrush current, Is Vin stable during that time ? 

    Is the GATE turning OFF during that event. ? or only FLT_I is getting asserted ?

    Best Regards,

    Rakesh

  • 0 in reply to Rakesh
    Prodigy 10 points

    The output capacitance is 440 uF. I am aware of the huge inrush current, but I assumed that by disabling the overcurrent protection, there would still be an output. The FLT_I gets asserted as well as the gate turns off. The input voltage is not stable. The input voltage dips significantly when INP is pulled high and then recovers back to its original value.

  • 0 in reply to Keerthi Kumanan
    TI__Guru** 105361 points

    Hi Keerthi,

    The GATE might be turning off due to input UVLO even though overcurrent protection is disabled.

    Can you share the test waveform of Vin, GATE, FLT_I and input current

    Please use RC network on the GATE to manage inrush current

    Best Regards,

    Rakesh