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TPS6594-Q1: How to only Reset SOC?

Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TDA4VM

Hi,Experts:

       I fail to only Reset SOC with using TPS65941212 + TPS65941111 to control TDA4vm voltage.

       I only set the  MISC_CTRL Register (Offset = 81h)  with the value "0x19" to Control for  nRSTOUT_SOC signal to  Low .

       Q1:  I check the  nRSTOUT_SOC signal have been Low,But my MCU didn't   normal running (like the MCU power has down) I don't have idea to solve this issue,Pls give me some addvise.Ths!

      As the follow picture is my MCU supply voltage & nRSTOUT_SOC signal pin..

      Q2:  I found my MCU didn't   normal running (like the MCU power has down) when I disable TPS65941111  -- BUCK1  voltage . This's the other question, Can you give some addvise to check?

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I want to Set the value--->

Uart show what I set the value--->

Hardware Schematic Diagram.

Best Regards,

Qi

  • Hello Qi,

    Setting nRSTOUT_SOC on the PMICs will not cause PMIC rails to turn off. It will only tell the SOC to reset.

    I found my MCU didn't   normal running (like the MCU power has down) when I disable TPS65941111  -- BUCK1  voltage 

    Disabling TPS65941111-BUCK1 will cause PMIC to interpret it as a fault on BUCK1. This will cause PMIC to enter MCU-Only mode and disable several rails. 

    Please refer to the PDN-0B user guide for information on fault and interrupt handling. https://www.ti.com/lit/pdf/slvuc32

  • Hi,Michael:

        Ths for your reply!

    as you said:Setting nRSTOUT_SOC on the PMICs will not cause PMIC rails to turn off. It will only tell the SOC to reset.

    --->Yes,I want to test only reset the SOC.But I found my MCU1_0 didn't continued run when I set the value to   MISC_CTRL Register (Offset = 81h).

    Am I doing the right thing to test only SOC reset?~

    .

    Best Regards!

    Qi.

  • Hello Qi,

    Your question is about the reaction of the SOC, not the PMIC. I will reassign this thread to their team.

    Regards,

    Mike Gambrill

  • To reset only the TDA4VM's Main processing only, the warm reset RESET_REQz input pin can be asserted low or a SW equivalent bit can be set. Likewise, to reset the MCU & Main processing together, the warm reset MCU_RESETz input pin can be asserted low or SW equivalent bit can be set.  The "warm reset" term describes resets that occur without removing or cycling SoC's power.  A Power On Reset (PORz & MCU_PORz) occurs whenever a "cold reset" occurs which forces a power cycle sequence of the SoC.

    The TDA4VM reset control details are described in section 5.3 of the Technical Reference Manual (TRM) and summarized in Table 5-2421 (shown below). Please download the TRM from the TI's Customer Document Distribution System (CDDS) link given below.

    https://cdds.ext.ti.com/ematrix/common/TIemxNavigator.jsp?objectId=28670.42872.1797.39618&ticket=ST-4355-505PnCEOerfblRoAda2o-cas

    In addition, the TDA4VM data manual (DM) describes the MCU & Main reset controls as well in section 9.2.4, shown below. 

    The TDA4VM EVM User's Guide provides a table summarizing the individual MCU & Main reset functions and the EVM's functional reset architecture block diagram, both shown below.