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TPS53353: JEDEC DDR5

Sen Chen
Prodigy 10 points
Part Number: TPS53353
Other Parts Discussed in Thread: TPS53832A

Hi, My Friend:

When studying JEDEC DDR5 PIMIC spec, I found Bulk Input (VIN-BULK, 5V) of DDR5 UDIMM/SODIM is restricted  as below:

1) BULK Input Ramp UP = 0.1 ~ 3.0 V/mS

2) BULK Input Ramp Down = 0.5 ~ 1.0 V/mS

 

I also surveyed the datasheet of TI TPS53353, which was designed in Intel Raptor Lake-S Platform (RPV). My questions are:

1) Dose the soft-start mechanism of TPS53353 achieve "5VOUT Ramp UP = 0.1 ~ 3.0 V/mS?"

2) Is there any property of TPS53353 to achieve  "5VOUT Ramp Down = 0.5 ~ 1.0 V/mS?" Which page of TPS53353 datasheet shows it?

 

I emphasize that TPS53353 is designed in Mother Board and to offer 5V to Bulk-VIN of UDIMM or SO-DIMM.

Many Thanks!

Sen

  • 0
    TI__Genius 11315 points

    Hey Sen,

    The TPS53353 was not designed with DDR5 specifications in mind. TI offers the TPS53832A, which is JEDEC complaint and built with DDR5 in mind.

    Thanks,
    Caleb

  • 0 in reply to Caleb Perez
    Prodigy 10 points

    Hi, Caleb:

    I found TPS53832A is designed on DIMM.

    In my previous mail, I have mentioned that TPS53353 was designed on Intel RPL-S Reference Board, which is "Mother Board." I did not say TPS53353 was used on DIMM.

    Intel employed TPS53353 to convert 5V on the mother board to supply VIN-BULK pins of DDR5 DIMM. But, JEDEC has defined some criteria for MB designers to follow, which was talked in my previous mail.

    My question is on the power down phase.

    Thanks!

    Sen

  • 0 in reply to Sen Chen
    TI__Genius 11315 points

    Hey Sen,

    I understand. The startup phase should allow the part to reach JEDEC spec, assuming the correct soft start time is used. For example, 0.7ms soft start time at a vout of 5V would be 7.14V/ms ramp up. 2.8ms soft start would be a ramp of 1.78V/ms. 

    Ramp down can be seen in Figure 6-15. Looks like it meets the spec as well. This will depend on the load, which is why it is not characterized.

    Thanks,
    Caleb

  • 0 in reply to Caleb Perez
    Prodigy 10 points

    Hi, Caleb:

    Even I have checked the Figure 6-15, and but after I "peered" into TPS53353 block diagram:

    May I say there is still "no" mechanism inside TPS53353 to discharge the Vout when it shutdowns?

    Thanks!

    Sen

  • 0 in reply to Sen Chen
    TI__Genius 11315 points

    Hey Sen,

    There is no specific mechanism. The device turns both the high side and low side MOSFETs off.

    Thanks,
    Caleb