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TPS65219: Using 3.3 V or 5 V Vsys vs. POR rising threshold, external supervisor needed?

Robert Finger
Genius 17367 points
Part Number: TPS65219

Team,

It looks like the VSYSPOR_Rising threshold is fixed at 2.2-2.5 V (see datasheet). So this would mean the PMIC starts it power up sequence after ~2.5 V are reached. But this would be too early for any internal buck which is configured for a 3.3 V output.

And the threshold is also too low to safely monitor any external 3.3 V or 5 V VSYS input.

Therefore I would assume that in any case an external supervisor will be needed to monitor the VSYS input. This aspect is missing in application notes like “Powering the AM62x with the TPS65219 PMIC”.

Can you please clarify?

Thanks,
  Robert

  • 0
    TI__Mastermind 22186 points

    Hi Robert,

    There are two conditions that gate the transition from OFF to Initialize. These are VSYS above VSYS_POR threshold and the internal VCC1P8 being in regulation. After that, PMIC transitions from OFF to Initialize state but it does not execute the power-up sequence until the NVM content is loaded into the registers which takes approximately 2.3ms. Once the PMIC is in Initialize state, if the FSD (first supply detection) feature is enabled, the power-up sequence is executed without waiting for an ON-request.

    If customers want to gate the power-up sequence based on the voltage from the pre-regulator, then the FSD feature can be disabled and the EN/PB/VSENSE pin can be configured as VSENSE to monitor the voltage on the pre-reg using a resistor divider. These settings would have to be configured in the NVM by default.

    The AM62 Apps note is more focused on the pre-programmed TPS65219 variants that we have available today but we are planning to release a new revision so will add additional info as you suggested. Please let us know if you have additional questions or need clarification.  

    Thanks,

    Brenda

  • 0
    Prodigy 70 points

    Hi Brenda,

    thanks for your explanation. In the newest datasheet revision V_VSENSE is tolerated with +-10%. This is not a usable comparator threshold for supply sensing. I think it is not possible to use this PMIC without a supervisor IC.

    Regards,

    Tim

  • 0 in reply to Tim Tauch
    TI__Mastermind 22186 points

    Hi Tim,

    Thanks for sharing feedback on the VSENSE feature. I'll share this information with our system team so it is taken into account for new PMIC developments. Which TPS65219 variant are you planning to use? Please note if the FSD feature is enabled, the state of the EN/PB/VSENSE pin is ignored during the first power-up and the PMIC executes the power-up sequence without waiting for an ON-request. 

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    Prodigy 70 points

    Hi Brenda,

    We have a 5V supply, LPDDR4 and 0,75 V core voltage. We need hard-reset and FSD feature. For this combination there is no TPS65219 variant available which fits well. In close coordination with Robert we will now use TPS6521902 + supervisor + DC/DC.

    It's a pity that there is no suitable variant available yet.

    Best regards,

    Tim

  • +1 in reply to Tim Tauch
    TI__Mastermind 22186 points

    Hi Tim,

    Any of the TPS65219 variants can be supplied by 3.3V or 5V (as long as the PMIC outputs are configured for <3.3V). This means TPS6521902 can be used for 5V Vin, LPDDR4, CORE=0.75V or 3.3V Vin, LPDDR4, CORE=0.75V. For the 5V Vin, the external power-switch is replaced with a Buck as shown in the capture below.  

    I also wanted to include the link to the TPS6521902 TRM which shows the default register settings: TPS6521902 Technical Reference Manual. Feel free to let us know if you have any questions. Robert Finger can help to identify the external supervisor based on your application requirements. 

     

    Thanks,

    Brenda