Hi, I've been experimenting with the enable/shutdown function of the TPS75933KC 3.3V fixed output LDO to inhibit the power of an EEPROM; however, I'm noticing some unusual and undesirable behaviours. The circuit, which is part of a multi-voltage supply system (i.e. 3.3V_processor and 3.3V_eeprom), consists of an LDO and its Vout (3.3V_eeprom) is connected to the Vcc of the EEPROM. The common data/address bus of the EEPROM is driven by a processor operating from a separate power source (3.3V_processor) that is never turned off. The problem is that when the LDO is in shutdown mode (enable pin pulled up), 2.7~3.3V could still be detected on the Vcc pin. After performing a few isolated tests, I have concluded the following: 1) If the data bus of the EEPROM is driven by the processor while the LDO is in shutdown, a voltage could be measured on the Vcc terminal of the EEPROM. 2) The current flowing back to the LDO (i.e. from processor data bus -> eeprom data bus -> eeprom Vcc terminal -> LDO output) is only limited by the internal resistance of the LDO. If I take out the LDO and tie the Vcc of the EEPROM to ground, the 3.3V_processor voltage supply goes into over-current protection. Could someone please explain these observations and suggest a way to properly turn off the EEPROM using this particular LDO.