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Original question:

TPS7A69-Q1: IC parameter request

TPS7A69-Q1: Power management forum

chen yuran
Prodigy 20 points
Part Number: TPS7A69-Q1

Hello expert,

  About TPS7A69-Q1,you said that I_max_RES is Ilkg=1uA, can I understand that the RESET pin can only withstand a maximum current of 1uA?

  Would this be too small? If I use 5V VDD to pull up and connect a 2.4KΩ resistor to the RES pin, does that mean it will damage the LDO? Because the current at this time has exceeded 1uA.

  • 0
    TI__Guru 50025 points

    Hi Chen,

    No, the Ilkg spec is saying that the maximum leakage current while PG is high-impedance (i.e. VOUT is at target) is 1uA, assuming a 10kΩ pull up resistor. The V_OL spec mentions that the current for this test is 0.5mA, so the PG pin can sink at least 0.5mA, although I don't have any data to show the maximum allowed current. Is there a reason that you want to use 2.4kΩ for the pull up instead of 10kΩ? 10kΩ is normally used to ensure that the logic levels are well-defined.

    Regards,

    Nick

  • 0 in reply to Nick Butts
    Prodigy 20 points

    Hello, Nick.

    Using a 2.4KΩ resistor as a pull-up resistor is our design based on another LDO IC. We plan to use TPS7A69 as a second source. If I don’t want to change this 2.4KΩ resistor, is there any risk to TPS7A69?

  • 0 in reply to chen yuran
    TI__Guru 50025 points

    Hi Chen,

    The consideration is whether the logic-low signal will be low enough to be interpreted as a valid signal. You can expect the internal pull down to be on the order of a few hundred ohms, so depending on the voltage that it is pulled up to, the 2.4kΩ resistor may not provide a large enough IR drop.

    Regards,

    Nick

  • 0 in reply to Nick Butts
    Prodigy 20 points

    Hello, Nick.

    Our MCU is reset high, so there is no need to worry about whether a logic low signal is low enough to be interpreted as a valid signal. But we want to know the maximum current that RES(PG) pin can withstand, because when VDD=5V and the pull-up resistor is 2.4KΩ, the current flowing through the RES(PG) pin is about 2.1mA. Will this current affect the LDO?

  • 0 in reply to chen yuran
    TI__Guru 50025 points

    Hi Chen,

    I talked to our design team and it is common to sink a few mA in PG. I don't know what the actual maximum is, but 2.1mA is fine. 

    Regards,

    Nick