TPS565201: Drop in voltage when load is applied

Hi Sai!

Could you tell me that the drop is a transient behavior or 0.3V drop will hold once 5ohm loading is implemented.

Shuai

Hi Shuai,

Thanks for your reply.

0.3V drop will hold once 5 ohm loading is implemented.

Hi Sai!

Pls measure the voltage between output cap directly.

Shuai

It should be caused by the resistance of wire between output cap and your load.

HI Shuai ,

I did measure it it is 4.91V at the output caps and 4.7V near the load as you said the wire is adding up some resistance. So now is there any possibility to reduce the 4.91V drop.

Based on you FB resistor the target output is 4.9324V. 20mV->0.4% load regulation is actually a normal performance level. If you want to optimize, pls provide the layout.

Shuai

Shall i send it here or shall i mail you

Both are available.

at the same why is it reducing from 5v to 4.9v when i add a load in the normal performance?

PCB trace resistance is inserted into you feedback loop.

Hi Shuai,

I have attached the PDF, Have look and let me know

TPS5652.pdf

Pls don't let SW trace under the IC.

For power circuit, all of pad of capacitor and inductor should use full connection.

FB trace should connect to output cap pad, instead of copper.

Below is a reference.

Will try all the changes and will let you know

After new layout completed, pls let me review.

Shuai

Hi Shuai,

We tried the changes as u said on a dot board but yet we see the same issue.

What do you mean dot board?

Shuai

Its a Perforated Board or a plain FR4 board where you can mount your components.

Sai

Hi Sai! 

Get it!

What is the output voltage difference between 0A and 5A with your new layout?

Actually, based on our official EVM board, the difference is about 60mV. It is the best result based on layout optimizatoin.

Shuai

Hi Shuai.

Sorry for the late reply,

so now 3.3Vout at 0A and at 1A 5ohms load it is 3.2Vout,

So your saying the EVM board will only have a drop of 60mV for 5A and this is achieved by optimized layout.

Is layout alone a problem or anything else is adding up?

Regards,

Sai

Hi Sai!

Can you show me your latest layout? 

Following is out EVM layout.

Shuai

Hi Shuai,

By seeing the layout i can say that my latest layout is pretty bad.

so is there any possibility where you can send me the gerber file of this layout so that we can replicate the same and test.

And is this IC so specific to layout and is TPS568230 also kind of same specific to layouting.

Regards,

Sai

Hi Sai!

Pls provide your email address.

Shuai

Hi Shuai,

sai.prakash@bpl.in this is my mail ID.

and it did complete put the IC to test, The device was able to do up to 5V  5 amps and as i increased the load from 0 - 5 amps there was a drop of 100mv and with 5amp load i had 4.55V in my output. I tried doing some changes in the SW pin like adding external wire with different thickness and different length which had a direct relation with my out voltage. i have attached a image as an example of what i tried.

you can close this case for now, i will change the layout as it seems to be my bigger problem and will get back if required.

Thank you.

Regards,

Sai