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LM5069: -2 variant Auto-restart functionality not working as expected

Part Number: LM5069
Other Parts Discussed in Thread: TPS2662

Hi,

We are using the LM5069MM-2/NOPB in one of your new designs. The -2 variant is supposed to have auto restart functionality once the fault condition is removed. 

In my design, the LM5069 is used for current limiting/short circuit cut-off in case of short circuits downstream from the LM5069 output. When I designed the circuit, I used the calculator provided by TI to calculate component values. I designed it to cut off output at >200mA of output current. Typical operating voltage is ~55-60V. This short circuit cut-off works fine in terms of cutting off the output in case of a downstream short circuit (or leakage current more than ~200-220mA. However, my expectation was that once the over-current/short circuit condition is removed, it should restart WITHOUT having to disconnect the load completely.

For example, I am testing my circuit with a Electronic Load configured to CC (constant current) mode. As I increase the current to >200mA, the LM5069 shuts off the output, as expected.

At this point, I start reducing the Electronic Load's Constant Current setting and expect the device to start up again (after the 7-8 seconds of delay) once the current draw is, let's say, set to 150mA. Instead it stays in fault mode. Even when I reduce the Electronic Load's CC setting down to 10mA it stays in fault mode. Only when I remove the load completely, the device restarts again. Is this how its supposed to work? For my use case, a load of <150mA is NOT a fault condition, and my expectation was that once the load falls below 150-200mA the device would turn on the mosfet again. Schematic is attached.

Pls advise what is the expected behaviour, and how I can get the behaviour I desire.

Best Regards,
Saad

  • Hi Saad,

    Welcome to E2E 

    The device is expected to recover the output once the fault is removed.

    Can you share the design calculator and overload test waveforms (vout, gate, timer, output current) for review.

    Does the output recover, If you remove the ectronic load, ?

    Can you test with 10nf timer capacitor ? 1uF is relatively large, I want to check if that is the reason 

    Best regards 

    Rakesh

  • Hi Saad,

    Did you get chance to capture overload test waveforms  (vout, gate, timer, output current)  ?

    Best regards 

    Rakesh

  • Hi Rakesh, 

    I haven't been able to get all the info you asked yet due to some public holidays on this end. 

    Can you share the design calculator and overload test waveforms (vout, gate, timer, output current) for review.

    Pls find attached the design calculator I can find from when the design was done.

     Copy of LM5069_Design_Calculator_REV_C.xlsx

    Does the output recover, If you remove the ectronic load, ?

    Yes. If I remove the electronic load, or turn off the load, or put the load current to 0, then the output DOES recover. On the other hand, even with a small load (e.g 10mA) the output does not recover. 

    Can you test with 10nf timer capacitor ? 1uF is relatively large, I want to check if that is the reason 

    I did test this quickly on Friday. After changing to 10nF (0.01uF) the device wouldn't even start, even under no load. 

    Can you share the design calculator and overload test waveforms (vout, gate, timer, output current) for review.

    I will try to get the waveform for you this week. Shall I get them with 1uF timer Capacitor or 10uF?

    Regards,
    Saad

  • Hi Saad,

    You need to increase the power limit value to start with 150mA of load.

    Plim > Vinmax *150mA *1.25

    where 1.25 considers 25% margin to account for inaccuracies in Plim and load variations.

    With the present MOSFET, you can start with 100mA load only. Pls refer attached design sheet

    2768.Copy of LM5069_Design_Calculator_REV_C.xlsx

    Please try with the values in the design calculator.

    You can select integrated solution such as TPS2662 where we won't have any FET related challenges and reduces the design complexity.

    Best Regards,

    Rakesh