.Is the TPS65910,is the only recomemended PMU for this AM3353?
3.The TPS65910, has 2 separate I2C buses: CTL-I2C and SR-I2C (for smart Reflex). Is it mandatory to use both of them, 1 in each I2C channel
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.Is the TPS65910,is the only recomemended PMU for this AM3353?
3.The TPS65910, has 2 separate I2C buses: CTL-I2C and SR-I2C (for smart Reflex). Is it mandatory to use both of them, 1 in each I2C channel
Are you sure you are asking the correct part number - AM3353.
I couldnt search this on TI webpage.
You will have to use CTL_I2C for accessing the internal registers on the device. The SR_I2C is required only for SR registers.
Hello,
Even we are using TPS65910A with AM3359.
Since we are not using SmartReflex feature of the TPS65910A, we can avoid SR-I2C interface.
And regarding General-purpose commands (CTL-I2C), where can I find the details of these commands.
According to my understanding all the voltages, timings etc are configured into the factory programmed EEPROM inside the IC.
Is it really required to access the internal registers through CTL-I2C?
Regards.
Ayus.
Hi,
Please use document available under
www.ti.com/product/tps65910
If you don't need SR-I2C interface (Smart Reflex), don't use it there is no problem whith this.
Regarding this question: Is it really required to access the internal registers through CTL-I2C?
The answer is yes I2C will be the only way to access internal register
Hello,
To power AM335x processors, please refer to the TPS65910Ax User's Guide For AM335x Processors (SWCU093A) available on Ti website
Thanks.
Best regards,
Flore
Hi,
The TPS65910 user guide does not have any explanation about the CTL-I2C interface, like how the addressing and R/W packets has to be framed. It just simply says that the hardcoded address 2Dh (7 bit). It would be required to know the read and write packet sequence. Where can I get that informaiton?.
Thanks
Kamal
Can you post a more detailed timing diagram on how to perform a read? We are using an external i2c controller (as we were seeing some issues with the PMIC) and wanted to try a few things. But unfortunately we are unable to get it going as we can't figure out the right sequence. I can't also see the attachme nt from the post. For a Read we do the following:
Start Bit
Write Slave Address 0x5A //WRITE ADDRESS
Wait for ACK
Write Data Reg. 0x80
Wait for Ack
Sent Start again (Restart)
Write Slave Address 0x5B //READ ADDRESS
Wait for ACK
Perform Read (send dummy byte to force clock)
Wait for ACK
Send Stop