We are using LP876411B4RQKRQ1 device. The following are the questions
a) Do we have to define the state transitions for WatchDog Error or the wam reset specified in the datasheet is automatically executed ?
b) The data sheet mentions that the device will enter warm reset in two condition. a) Initial Long window expiry and b) WD_RST_INT. Will this disturb any power rails ? The warm RESET# is mentioned as asserting nRESETOUT and nRESETOUT_SOC for a pre-determined time window. Where is the pre determined time window defined? Is this in a user programmable register ?