CSD87501L: PD 5V fault enable

Hello Fred,

Thanks for promoting TI FETs at your customer. What PD controller is the customer using? Can you share the schematic or send to me via regular email. Has the customer checked to see if there any shorts from source-to-source or gate-to-source?

Best Regards,

John Wallace

TI FET Applications

Hi Fred,

Following up to see if you've gotten any additional information from the customer. Please let me know.

Thanks,

John

Hello Fred,

Please provide an update on this issue at your earliest convenience.

Thanks,

John

Hi John,

sorry for late , I was spending time organizing customer's problem.

so here's the issue.

when they remove insulation tape to rework, the top coating was also removed,

so later they found  gate 2 short with top coating or marking, they want to know if there's something on the top that can't be removed or otherwise may cause problem?

Hi Fred,

The CSD87501L is a chip scale silicon device with no plastic packaging. I am not sure what is meant be insulation tape. Can you please email me directly at my TI email address.

Thanks,

John

Hi Fred,

Following up to see if you have any additional information from the customer. The top surface of the device is the substrate which is electrically connected to the common drain. It is possible that the part has failed short from gate 2 to drain. Or, it may be shorted from gate 2 to source 2 and because of the body diode, the customer measures a short from gate 2 to the common drain. Because this part is a silicon die, probing with a metal probe may chip or crack the device. We do not probing the FET or handling with metal tweezers (plastic only). Please let me know what else I can do to help.

Thanks,

John

Hi Fred,

Please provide an update or contact me via regular email regarding this issue.

Thanks,

John

Hi John ,

sorry for get back here late since customer stop investigating this for a while previously.

the new status is they found the surface of the device short to the source 2, which may  imply common drain short to source 2.

we want to know what scenario would cause source 2 short to drain.

I'm sending layout to you to let you check if there's anything wrong on the design.

Hi Fred,

The PCB layout and schematic look OK to me. A short from drain to source may have a number of different causes but typically it is due to an overstress of current (overheating/thermal runaway), voltage (avalanche) or SOA. What USB-C controller are they using?

Thanks,

John

Hi John,

thank you,

they’re using TPS65994BF ,

they found failure mostly during one Notebook sourcing another one with 5V/3A PDO,

which gate_Vsys and gate_Vbus is supposed to be 0V under 30% battery capacity, but it somehow will turn on if MOS was damaged.

any risk concern during this process?

Hi Fred,

I am not sure if there is any risk during this process. Are the FETs used in the notebook sourcing or are the internal power path switches? Is this a new design or mass production? What is the failure rate of the FETs? Can you ask the customer to share normal turn-on and turn-off waveforms (same as those in the scope shot in your original post) for good FETs? 

Thanks,

John

Hi John,

sure , I think the sourcing one use TPs65994BF internal PP5V power switch,

while sink side use external CSD87501.

it is still at final build before production and the fail rate is quite high so it’s definitely not quality problem 

Hi Fred,

Have you been in contact with the USB-C controller applications team? They may have better insight into these failures.

Thanks,

John