TPS5432: Possible causes of low side MOSFET burnout

Hi Moamen,

- Could you confirm if any external component (BOM) / layout changed from the old to new design for TPS5432

- Could you confirm if any external component (BOM) / layout changed from the old to new design on a system level that could impact TPS5432. For eg, pre-regulator / load etc.

- Is there any other power supply/circuit connected to the output that could pull Vout higher than Vin?

- Can you share a complete schematic and layout if possible?

-

Moamen Sharaqa said:

I've been trying to reproduce the failure in lab for weeks now but with no success so far.

Does this mean the failures are in the field and you could not find any issue in the lab?

- Do you have any scope plots to share with us.

- Now that you are redesigning, I strongly recommend to use one of our latest devices.

Regards,

Febin

Hi Febin,

- We are re-manufacturing the same board as is, so the layout is not changed.
The BOM is the same too, I'm sure that the Inductors are same components that have been used before, but for the ceramic capacitors and resistors, the values are same as before, but it might be possible that an alternative from another manufacturer with same specs is used.

- Yes on the system level there is a change, so the 12V Input supply is different, but I'm thinking if there is any issues there, for example over voltage spikes or something, this would be filtered by the 5V Stage (U103), or at least I should see defects on the 5V stage and not the 3V3.

- No, there is nothing that can pull Vout above Vin

- Unfortunately I can't share the full schematic or layout here

- Yes the failures are happening in the field, but I can't reproduce it in the lab

Here are scope plots for some of the measurements done:

This what I normally see on the PH pin on a functional board with the lower graph zooming on the switching moment:
nothing seems to go beyond the absolute maximum ratings
 

Though at power off of the board sometimes I see that the TPS5432 will start switching again for short periods and higher spikes are noticed,
 
The spikes seems to go beyond the 7V limit but only for about 1ns, I'm not sure if this is dangerous, but I've done an endurance test with over 10,000 cycles where these spikes are noticed, and still the failure of the chip is not reproduced. what is your opinion about these spikes?

digging a bit deeper, it seems the spikes happen during power off, when the PH sees an average voltage above the Vin for a couple of switching cycles, or at least this is my understanding for the measurement
 
honestly I can not explain exactly why this behaviour is happening some times, but I'm still trying to understand this more.

The plan was not to re-design the board, and to use the old HW as it is, that is why I'm currently not considering new chips.

I hope those Infos can help you have better idea about the issue.

It will also be very helpful for me if you can state another general root causes that could result in such a failure mode (short circuit of pin 3 with pin 4) so I can try to check if such causes could be present on this design or not.

Best Regards
Moamen

Hi Moamen,

Moamen Sharaqa said:

The spikes seems to go beyond the 7V limit but only for about 1ns, I'm not sure if this is dangerous, but I've done an endurance test with over 10,000 cycles where these spikes are noticed, and still the failure of the chip is not reproduced. what is your opinion about these spikes?

What I can think of is, if the spikes go above 7V in the lab, we cannot avoid the possibility of the spikes going higher than 7V or maybe also longer than 1ns in the field. 

Moamen Sharaqa said:

digging a bit deeper, it seems the spikes happen during power off, when the PH sees an average voltage above the Vin for a couple of switching cycles, or at least this is my understanding for the measurement

Yellow indicates PH? Isn't the spikes reaching approx 12V? Can you use a smaller time scale to understand the duration of these 12V spikes?

Why is the input voltage close to 2V during power off?

Does that mean the device is not turned off properly?

Regards,

Febin                                   

Hi Febin,

Febin said:

Yellow indicates PH? Isn't the spikes reaching approx 12V? Can you use a smaller time scale to understand the duration of these 12V spikes?

Yes Yellow is PH, Green is Vin, and Pink is Vout (at the output capacitor)

This snapshot shows the details of the spike

Febin said:

Why is the input voltage close to 2V during power off?

Does that mean the device is not turned off properly?

This is when the loads stop drawing much current and the capacitance is still having some charges in them.

It takes about 800-900ms until the capacitances are discharged and the voltages drops to zero.

Kind Regards
Moamen

Hi Moamen,

In the above scope plot, the Vin (green waveform) does not reach 0V? And the Vout (pink) seems to drop and then go back to ~2V? Why does this happen?

I think it would be really helpful if you share the full schematic. If you wish, you may also sent this privately.

Regards,

Febin

Hi Febin,

Febin said:

In the above scope plot, the Vin (green waveform) does not reach 0V?

As mentioned in my previous comment, It takes a bit longer for the capacitors to discharge than this snapshot is covering

Febin said:

And the Vout (pink) seems to drop and then go back to ~2V? Why does this happen?

I took a deeper dive in the datasheets and I've done some extra measurements and I think I can now explain what is happening.

The 12V Input supply has a relatively large output capacitance and It will take a couple of seconds until it completely discharges.
especially after all the loads are turned off after the 5V Converter (U103 in the initial post) go in the UVLO.
Since the EN pin of U103 is left floating, the internal thresholds are used, which is between 4V and 4.5V with 150mV hysteresis according to the datasheet of TPS54620.

Zooming on the first milliseconds after shutdown, you can see similar behaviour to the snapshots in the previous posts where the 5V and 3V3 Converters start switching again
  

Zooming further at the moment where these switching restarts happen, it is found that the 5V Converter (U103) starts first and then the 3V3 Converter (U104) shortly after

My Explanation for this behaviour is that during shutdown, when all loads are turned off the 12V rail (Input for U103) stays near the UVLO threshold of U103.
but due to the inductance of the connection between the 12V Input supply and the U103 input, the 12V rail will then rise again slightly over the hysteresis limit and the U103 will be enabled again, this by turn will push the 5V rail above the UVLO threshold of U104 (2.6V to 2.8V with 0.2V hysteresis according to the datasheet of TPS5432) and then the 3V3 converter will try to start again.
Now this extra current demand will cause the 12V rail to drop, and the cycle repeats a couple of times.

But Why does 3V3 rail drop to zero and what causes this high voltage spikes on the the PH pin of U104?

This is due to the soft start and reverse current protection mechanism of the chip.
according to the datasheets the chip will regulate the output to the minimum of the internal voltage reference or the voltage on SS pin, at the time of this start the voltage on SS pin is zero, but the output is pre-biased.
 

the U103 has the reverse current protection feature well designed with current limit on the Low side MOSFET and a SS threshold
   
  

this is not the case with U104, here it only depends on the measurement of the voltage across the low side MOSFET and it seems to implement a cycle by cycle limit, so the low side MOSFET will actually discharge the pre-biased output untill the protection kicks in.
    
    

But it seems this protection method is not really effective, since this problem is faced with a lot of people.
I've searched the forum for the posts related to TPS5432 and the same problem is noticed here, here, here, here and here,
But specially interesting is This Post, Kurt De Wit highlights in one of his comments the discrepancy between the current protection limit and the absolute maximum ratings of the low side MOSFET, he also seems to have done a very good analysis to his issue, which is similar to the one here "starting to pre-biased output"

I also agree with Kurt De Wit that the "Reverse Overcurrent protection" section of the datasheet is a bit misleading.
I think this should be clearly highlighted in the documentation of this chip or be listed as Errata to save your customers huge time and effort invested to debug such errors.

Best Regards,
Moamen

Hi Moamen,

I hope to provide some updates by tomorrow.

Regards,

Febin

Hi Moamen,

Since this is a very old device, I could not find any further explanation to your concerns. I will add your feedback to our worklog. 

We have highly efficient newer converters in our portfolio. Please consider one of them in your future designs.

Is there any other question from your side?

Regards,

Febin

Hi Febin,

Sorry for the late reply, we had holidays in the past few days.
I currently don't have further questions, thank you for your time and support on this matter.

Kind Regards
Moamen

Thanks for confirming.